diff options
| author | Alistair Francis | 2021-04-24 05:31:55 +0200 |
|---|---|---|
| committer | Alistair Francis | 2021-05-11 12:02:07 +0200 |
| commit | 994b6bb2db8d9d21207aa3a9991b9789c3d3d1ca (patch) | |
| tree | 76504721fb3dda87a7bae982e68d67007514a126 /target/riscv/cpu_bits.h | |
| parent | target/riscv: Remove the hardcoded SSTATUS_SD macro (diff) | |
| download | qemu-994b6bb2db8d9d21207aa3a9991b9789c3d3d1ca.tar.gz qemu-994b6bb2db8d9d21207aa3a9991b9789c3d3d1ca.tar.xz qemu-994b6bb2db8d9d21207aa3a9991b9789c3d3d1ca.zip | |
target/riscv: Remove the hardcoded HGATP_MODE macro
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 665f624bfdc2e3ca64265004b07de7489c77a766.1619234854.git.alistair.francis@wdc.com
Diffstat (limited to 'target/riscv/cpu_bits.h')
| -rw-r--r-- | target/riscv/cpu_bits.h | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 3a0e79e545..d738e2fdbd 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -195,17 +195,6 @@ #define CSR_HTIMEDELTA 0x605 #define CSR_HTIMEDELTAH 0x615 -#if defined(TARGET_RISCV32) -#define HGATP_MODE SATP32_MODE -#define HGATP_VMID SATP32_ASID -#define HGATP_PPN SATP32_PPN -#endif -#if defined(TARGET_RISCV64) -#define HGATP_MODE SATP64_MODE -#define HGATP_VMID SATP64_ASID -#define HGATP_PPN SATP64_PPN -#endif - /* Virtual CSRs */ #define CSR_VSSTATUS 0x200 #define CSR_VSIE 0x204 |