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authorAlistair Francis2020-11-04 05:43:23 +0100
committerAlistair Francis2020-11-10 00:08:45 +0100
commitc445593d30037d0c82241e8ec23eb845bca476e9 (patch)
tree82d58f9d6b1887110ffffd9ae7805c2607d4ebcc /target/riscv/cpu_helper.c
parentMerge remote-tracking branch 'remotes/kraxel/tags/ui-20201104-pull-request' i... (diff)
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target/riscv: Add a virtualised MMU Mode
Add a new MMU mode that includes the current virt mode. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 4b301bc0ea36da962fc1605371b65019ac3073df.1604464950.git.alistair.francis@wdc.com
Diffstat (limited to 'target/riscv/cpu_helper.c')
-rw-r--r--target/riscv/cpu_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 3eb3a034db..9dfa7af401 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -323,7 +323,7 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
* (riscv_cpu_do_interrupt) is correct */
MemTxResult res;
MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
- int mode = mmu_idx;
+ int mode = mmu_idx & TB_FLAGS_PRIV_MMU_MASK;
bool use_background = false;
/*