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| author | Weiwei Li | 2022-04-23 04:35:07 +0200 |
|---|---|---|
| committer | Alistair Francis | 2022-04-29 02:47:45 +0200 |
| commit | 0976083d1be23d72b9a4857f6d8c3d86b5f11efa (patch) | |
| tree | 27b04aea908e02c9ef8ae53aeb18dbd4ad594afb /target/riscv/crypto_helper.c | |
| parent | target/riscv: rvk: add support for sha512 related instructions for RV64 in zk... (diff) | |
| download | qemu-0976083d1be23d72b9a4857f6d8c3d86b5f11efa.tar.gz qemu-0976083d1be23d72b9a4857f6d8c3d86b5f11efa.tar.xz qemu-0976083d1be23d72b9a4857f6d8c3d86b5f11efa.zip | |
target/riscv: rvk: add support for zksed/zksh extension
- add sm3p0, sm3p1, sm4ed and sm4ks instructions
Co-authored-by: Ruibo Lu <luruibo2000@163.com>
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220423023510.30794-12-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/crypto_helper.c')
| -rw-r--r-- | target/riscv/crypto_helper.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c index cb4783a1e9..2ef30281b1 100644 --- a/target/riscv/crypto_helper.c +++ b/target/riscv/crypto_helper.c @@ -271,4 +271,32 @@ target_ulong HELPER(aes64im)(target_ulong rs1) return result; } + +target_ulong HELPER(sm4ed)(target_ulong rs1, target_ulong rs2, + target_ulong shamt) +{ + uint32_t sb_in = (uint8_t)(rs2 >> shamt); + uint32_t sb_out = (uint32_t)sm4_sbox[sb_in]; + + uint32_t x = sb_out ^ (sb_out << 8) ^ (sb_out << 2) ^ (sb_out << 18) ^ + ((sb_out & 0x3f) << 26) ^ ((sb_out & 0xC0) << 10); + + uint32_t rotl = rol32(x, shamt); + + return sext32_xlen(rotl ^ (uint32_t)rs1); +} + +target_ulong HELPER(sm4ks)(target_ulong rs1, target_ulong rs2, + target_ulong shamt) +{ + uint32_t sb_in = (uint8_t)(rs2 >> shamt); + uint32_t sb_out = sm4_sbox[sb_in]; + + uint32_t x = sb_out ^ ((sb_out & 0x07) << 29) ^ ((sb_out & 0xFE) << 7) ^ + ((sb_out & 0x01) << 23) ^ ((sb_out & 0xF8) << 13); + + uint32_t rotl = rol32(x, shamt); + + return sext32_xlen(rotl ^ (uint32_t)rs1); +} #undef sext32_xlen |