diff options
| author | LIU Zhiwei | 2022-01-20 13:20:32 +0100 |
|---|---|---|
| committer | Alistair Francis | 2022-01-21 06:52:57 +0100 |
| commit | 440544e1cff9877cdf17aae4ecfe775410b1eff2 (patch) | |
| tree | b62889afe35f170e2adbbe6886532cdc5016d052 /target/riscv/csr.c | |
| parent | target/riscv: Sign extend pc for different XLEN (diff) | |
| download | qemu-440544e1cff9877cdf17aae4ecfe775410b1eff2.tar.gz qemu-440544e1cff9877cdf17aae4ecfe775410b1eff2.tar.xz qemu-440544e1cff9877cdf17aae4ecfe775410b1eff2.zip | |
target/riscv: Create xl field in env
Current xlen has been used in helper functions and many other places.
The computation of current xlen is not so trivial, so that we should
recompute it as little as possible.
Fortunately, xlen only changes in very seldom cases, such as exception,
misa write, mstatus write, cpu reset, migration load. So that we can only
recompute xlen in this places and cache it into CPURISCVState.
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220120122050.41546-6-zhiwei_liu@c-sky.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/csr.c')
| -rw-r--r-- | target/riscv/csr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 6bc7ee780c..9be2820d2b 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -589,6 +589,7 @@ static RISCVException write_mstatus(CPURISCVState *env, int csrno, mstatus = set_field(mstatus, MSTATUS64_UXL, xl); } env->mstatus = mstatus; + env->xl = cpu_recompute_xl(env); return RISCV_EXCP_NONE; } @@ -704,6 +705,7 @@ static RISCVException write_misa(CPURISCVState *env, int csrno, /* flush translation cache */ tb_flush(env_cpu(env)); env->misa_ext = val; + env->xl = riscv_cpu_mxl(env); return RISCV_EXCP_NONE; } |