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| author | Alistair Francis | 2020-02-01 02:02:02 +0100 |
|---|---|---|
| committer | Palmer Dabbelt | 2020-02-27 22:45:31 +0100 |
| commit | df30e652d42f9528e538d0a8de44879643a7fc0a (patch) | |
| tree | f74b81f36fff3b7d7bfb8ce53cc6f6605f55eadd /target/riscv/csr.c | |
| parent | target/riscv: Print priv and virt in disas log (diff) | |
| download | qemu-df30e652d42f9528e538d0a8de44879643a7fc0a.tar.gz qemu-df30e652d42f9528e538d0a8de44879643a7fc0a.tar.xz qemu-df30e652d42f9528e538d0a8de44879643a7fc0a.zip | |
target/riscv: Dump Hypervisor registers if enabled
Dump the Hypervisor registers and the current Hypervisor state.
While we are editing this code let's also dump stvec and scause.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'target/riscv/csr.c')
0 files changed, 0 insertions, 0 deletions