diff options
| author | Philipp Tomsich | 2021-09-11 16:00:09 +0200 |
|---|---|---|
| committer | Alistair Francis | 2021-10-07 00:33:16 +0200 |
| commit | fd4b81a304a5d50e719019d22eacca2d8ef4de69 (patch) | |
| tree | c081a56a2166be9d7c112e32e7773d082fa872d2 /target/riscv/insn32.decode | |
| parent | target/riscv: Reassign instructions to the Zbs-extension (diff) | |
| download | qemu-fd4b81a304a5d50e719019d22eacca2d8ef4de69.tar.gz qemu-fd4b81a304a5d50e719019d22eacca2d8ef4de69.tar.xz qemu-fd4b81a304a5d50e719019d22eacca2d8ef4de69.zip | |
target/riscv: Add instructions of the Zbc-extension
The following instructions are part of Zbc:
- clmul
- clmulh
- clmulr
Note that these instructions were already defined in the pre-0.93 and
the 0.93 draft-B proposals, but had not been omitted in the earlier
addition of draft-B to QEmu.
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210911140016.834071-10-philipp.tomsich@vrull.eu
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/insn32.decode')
| -rw-r--r-- | target/riscv/insn32.decode | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 35a3563ff4..1658bb4217 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -714,6 +714,11 @@ roriw 0110000 .......... 101 ..... 0011011 @sh5 greviw 0110100 .......... 101 ..... 0011011 @sh5 gorciw 0010100 .......... 101 ..... 0011011 @sh5 +# *** RV32 Zbc Standard Extension *** +clmul 0000101 .......... 001 ..... 0110011 @r +clmulh 0000101 .......... 011 ..... 0110011 @r +clmulr 0000101 .......... 010 ..... 0110011 @r + # *** RV32 Zbs Standard Extension *** bclr 0100100 .......... 001 ..... 0110011 @r bclri 01001. ........... 001 ..... 0010011 @sh |