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authorPeter Maydell2020-08-21 13:42:49 +0200
committerPeter Maydell2020-08-21 13:42:49 +0200
commit7fd51e68c34fcefdb4d6fd646ed3346f780f89f4 (patch)
treeb4c90dc51c2babb9850d29d0e3349891b2988172 /target/riscv/insn_trans/trans_rvh.c.inc
parentMerge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2020-08-11' in... (diff)
parentdocs: convert build system documentation to rST (diff)
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Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
New build system, with "fake in-tree builds" support. Missing: * converting configure tests * converting unit tests * converting some remaining parts of the installation # gpg: Signature made Fri 21 Aug 2020 11:33:35 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (152 commits) docs: convert build system documentation to rST meson: update build-system documentation meson: avoid unstable module warning with Meson 0.56.0 or newer meson: convert po/ meson: convert VNC and dependent libraries to meson meson: move SDL and SDL-image detection to meson meson: convert sample plugins meson: replace create-config with meson configure_file rules.mak: drop unneeded macros meson: convert check-block meson: build texi doc docs: automatically track manual dependencies meson: sphinx-build remove Makefile.target rules.mak: remove version.o meson: convert systemtap files configure: place compatibility symlinks in target directories meson: link emulators without Makefile.target meson: plugins meson: cpu-emu ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/riscv/insn_trans/trans_rvh.c.inc')
-rw-r--r--target/riscv/insn_trans/trans_rvh.c.inc37
1 files changed, 37 insertions, 0 deletions
diff --git a/target/riscv/insn_trans/trans_rvh.c.inc b/target/riscv/insn_trans/trans_rvh.c.inc
new file mode 100644
index 0000000000..263b652d90
--- /dev/null
+++ b/target/riscv/insn_trans/trans_rvh.c.inc
@@ -0,0 +1,37 @@
+/*
+ * RISC-V translation routines for the RVXI Base Integer Instruction Set.
+ *
+ * Copyright (c) 2020 Western Digital
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+static bool trans_hfence_gvma(DisasContext *ctx, arg_sfence_vma *a)
+{
+ REQUIRE_EXT(ctx, RVH);
+#ifndef CONFIG_USER_ONLY
+ gen_helper_hyp_tlb_flush(cpu_env);
+ return true;
+#endif
+ return false;
+}
+
+static bool trans_hfence_vvma(DisasContext *ctx, arg_sfence_vma *a)
+{
+ REQUIRE_EXT(ctx, RVH);
+#ifndef CONFIG_USER_ONLY
+ gen_helper_hyp_tlb_flush(cpu_env);
+ return true;
+#endif
+ return false;
+}