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author | Richard Henderson | 2020-07-24 02:28:04 +0200 |
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committer | Alistair Francis | 2020-08-22 07:37:55 +0200 |
commit | 00e925c56074f8c4923a087e2eecea8a3315ea40 (patch) | |
tree | 4c48cd11c2863a27beb39ddf4cb0524cbf25a6f0 /target/riscv/internals.h | |
parent | target/riscv: Generate nanboxed results from trans_rvf.inc.c (diff) | |
download | qemu-00e925c56074f8c4923a087e2eecea8a3315ea40.tar.gz qemu-00e925c56074f8c4923a087e2eecea8a3315ea40.tar.xz qemu-00e925c56074f8c4923a087e2eecea8a3315ea40.zip |
target/riscv: Check nanboxed inputs to fp helpers
If a 32-bit input is not properly nanboxed, then the input is
replaced with the default qnan.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Message-Id: <20200724002807.441147-5-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/internals.h')
-rw-r--r-- | target/riscv/internals.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target/riscv/internals.h b/target/riscv/internals.h index 9f4ba7d617..f1a546dba6 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -43,4 +43,15 @@ static inline uint64_t nanbox_s(float32 f) return f | MAKE_64BIT_MASK(32, 32); } +static inline float32 check_nanbox_s(uint64_t f) +{ + uint64_t mask = MAKE_64BIT_MASK(32, 32); + + if (likely((f & mask) == mask)) { + return (uint32_t)f; + } else { + return 0x7fc00000u; /* default qnan */ + } +} + #endif |