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| author | Atish Patra | 2022-08-25 00:13:57 +0200 |
|---|---|---|
| committer | Alistair Francis | 2022-09-07 09:19:15 +0200 |
| commit | 3ec0fe18a31fabfe999b480e4c21847ac0d51560 (patch) | |
| tree | 944238c6356ff239d1a06129b81121b0ecaa5590 /target/riscv/pmu.c | |
| parent | target/riscv: Add stimecmp support (diff) | |
| download | qemu-3ec0fe18a31fabfe999b480e4c21847ac0d51560.tar.gz qemu-3ec0fe18a31fabfe999b480e4c21847ac0d51560.tar.xz qemu-3ec0fe18a31fabfe999b480e4c21847ac0d51560.zip | |
target/riscv: Add vstimecmp support
vstimecmp CSR allows the guest OS or to program the next guest timer
interrupt directly. Thus, hypervisor no longer need to inject the
timer interrupt to the guest if vstimecmp is used. This was ratified
as a part of the Sstc extension.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Message-Id: <20220824221357.41070-4-atishp@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/pmu.c')
0 files changed, 0 insertions, 0 deletions