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authorAlistair Francis2020-08-12 21:13:33 +0200
committerAlistair Francis2020-08-25 18:11:36 +0200
commitf2d5850f71f3e41b240f328c2bc844a4e44e66c9 (patch)
treec49500326419626349b45118db5549324af8f7db /target/riscv/translate.c
parenttarget/riscv: Fix the interrupt cause code (diff)
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target/riscv: Update the Hypervisor trap return/entry
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Message-id: e7e4e801234f2934306e734f65860f601a5745bd.1597259519.git.alistair.francis@wdc.com Message-Id: <e7e4e801234f2934306e734f65860f601a5745bd.1597259519.git.alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/translate.c')
-rw-r--r--target/riscv/translate.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 3919f570f7..79dca2291b 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -797,16 +797,6 @@ static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
#if !defined(CONFIG_USER_ONLY)
if (riscv_has_ext(env, RVH)) {
ctx->virt_enabled = riscv_cpu_virt_enabled(env);
- if (env->priv_ver == PRV_M &&
- get_field(env->mstatus, MSTATUS_MPRV) &&
- MSTATUS_MPV_ISSET(env)) {
- ctx->virt_enabled = true;
- } else if (env->priv == PRV_S &&
- !riscv_cpu_virt_enabled(env) &&
- get_field(env->hstatus, HSTATUS_SPRV) &&
- get_field(env->hstatus, HSTATUS_SPV)) {
- ctx->virt_enabled = true;
- }
} else {
ctx->virt_enabled = false;
}