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| author | David Hildenbrand | 2021-03-15 09:54:49 +0100 |
|---|---|---|
| committer | Cornelia Huck | 2021-03-15 11:03:20 +0100 |
| commit | 1a3c443c43e81e32a05d6995039e0f356b8f60cb (patch) | |
| tree | 6e97af58abd6d11cc951f88fbd22432d0009d406 /target/s390x/insn-data.def | |
| parent | target/s390x: Implement the MVPG condition-code-option bit (diff) | |
| download | qemu-1a3c443c43e81e32a05d6995039e0f356b8f60cb.tar.gz qemu-1a3c443c43e81e32a05d6995039e0f356b8f60cb.tar.xz qemu-1a3c443c43e81e32a05d6995039e0f356b8f60cb.zip | |
target/s390x: Store r1/r2 for page-translation exceptions during MVPG
The PoP states:
When EDAT-1 does not apply, and a program interruption due to a
page-translation exception is recognized by the MOVE PAGE
instruction, the contents of the R1 field of the instruction are
stored in bit positions 0-3 of location 162, and the contents of
the R2 field are stored in bit positions 4-7.
If [...] an ASCE-type, region-first-translation,
region-second-translation, region-third-translation, or
segment-translation exception was recognized, the contents of
location 162 are unpredictable.
So we have to write r1/r2 into the lowcore on page-translation
exceptions. Simply handle all exceptions inside our mvpg helper now.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210315085449.34676-3-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'target/s390x/insn-data.def')
| -rw-r--r-- | target/s390x/insn-data.def | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index e5b6efabf3..0bb1886a2e 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -641,7 +641,7 @@ /* MOVE NUMERICS */ C(0xd100, MVN, SS_a, Z, la1, a2, 0, 0, mvn, 0) /* MOVE PAGE */ - C(0xb254, MVPG, RRE, Z, r1_o, r2_o, 0, 0, mvpg, 0) + C(0xb254, MVPG, RRE, Z, 0, 0, 0, 0, mvpg, 0) /* MOVE STRING */ C(0xb255, MVST, RRE, Z, 0, 0, 0, 0, mvst, 0) /* MOVE WITH OPTIONAL SPECIFICATION */ |