diff options
| author | David Hildenbrand | 2017-06-09 15:34:26 +0200 |
|---|---|---|
| committer | Richard Henderson | 2017-06-13 20:09:39 +0200 |
| commit | 076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0 (patch) | |
| tree | 83b357618c62624cc4baf42094e8c50129b674b7 /target/s390x/misc_helper.c | |
| parent | target/s390x: rework PGM interrupt psw.addr handling (diff) | |
| download | qemu-076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0.tar.gz qemu-076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0.tar.xz qemu-076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0.zip | |
s390x/cpumodel: wire up cpu type + id for TCG
Let's properly expose the CPU type (machine-type number) via "STORE CPU
ID" and "STORE SUBSYSTEM INFORMATION".
As TCG emulates basic mode, the CPU identification number has the format
"Annnnn", whereby A is the CPU address, and n are parts of the CPU serial
number (0 for us for now).
A specification exception will be injected if the address is not aligned
to a double word. Low address protection will not be checked as
we're missing some more general support for that.
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20170609133426.11447-3-david@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/s390x/misc_helper.c')
| -rw-r--r-- | target/s390x/misc_helper.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 4daa01632e..b5081019c5 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -378,6 +378,7 @@ uint64_t HELPER(stpt)(CPUS390XState *env) uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) { + S390CPU *cpu = s390_env_get_cpu(env); int cc = 0; int sel1, sel2; @@ -397,12 +398,14 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, if ((sel1 == 1) && (sel2 == 1)) { /* Basic Machine Configuration */ struct sysib_111 sysib; + char type[5] = {}; memset(&sysib, 0, sizeof(sysib)); ebcdic_put(sysib.manuf, "QEMU ", 16); - /* same as machine type number in STORE CPU ID */ - ebcdic_put(sysib.type, "QEMU", 4); - /* same as model number in STORE CPU ID */ + /* same as machine type number in STORE CPU ID, but in EBCDIC */ + snprintf(type, ARRAY_SIZE(type), "%X", cpu->model->def->type); + ebcdic_put(sysib.type, type, 4); + /* model number (not stored in STORE CPU ID for z/Architecure) */ ebcdic_put(sysib.model, "QEMU ", 16); ebcdic_put(sysib.sequence, "QEMU ", 16); ebcdic_put(sysib.plant, "QEMU", 4); |