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authorPeter Maydell2022-07-18 20:27:25 +0200
committerPeter Maydell2022-07-18 20:27:25 +0200
commitb8bb9bbf4695b89bbdca702a054db0a7a2c8ff2b (patch)
treeab23c55d87b7e6c9ccf17692b830ca2548a1fc1b /target/s390x
parentMerge tag 'pull-target-arm-20220718' of https://git.linaro.org/people/pmaydel... (diff)
parenttarget/ppc: Check page dir/table base alignment (diff)
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Merge tag 'pull-ppc-20220718' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2022-07-18: This is the last ppc patch queue before the soft freeze. It contains new TCG instructions and changes, a tricky bug fix in kvmppc_find_cpu_dt() and other enhancements/fixes. - tcg and target/ppc: - move instructions to decodetree - check for bad Radix configs - ISA 3.00 tlbie[l] - fix gen_*_exception error codes - check fortb_env != 0 when printing TBU/TBL/DECR - fix kvmppc_find_cpu_dt() returning the wrong CPU DT path when there's a 'clock-frequency' property in the root node - spapr, e500: pass a random seed in /chosen/rng-seed - all boards: allocate IRQ lines with qdev_init_gpio_in() # gpg: Signature made Mon 18 Jul 2022 18:19:58 BST # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20220718' of https://gitlab.com/danielhb/qemu: (30 commits) target/ppc: Check page dir/table base alignment target/ppc: Improve Radix xlate level validation ppc: Check partition and process table alignment target/ppc: check tb_env != 0 before printing TBU/TBL/DECR target/ppc: Implement slbiag target/ppc: Move slbsync to decodetree target/ppc: Move slbfee to decodetree target/ppc: Move slbmfee to decodetree target/ppc: Move slbmfev to decodetree target/ppc: Move slbmte to decodetree target/ppc: Move slbia to decodetree target/ppc: Move slbieg to decodetree target/ppc: Move slbie to decodetree target/ppc: add macros to check privilege level target/ppc: receive DisasContext explicitly in GEN_PRIV target/ppc: Implement ISA 3.00 tlbie[l] target/ppc: Move tlbie[l] to decode tree target/ppc: fix exception error code in spr_write_excp_vector target/ppc: fix PMU Group A register read/write exceptions target/ppc: fix exception error code in helper_{load, store}_dcr ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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