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author | Markus Armbruster | 2019-04-17 21:17:58 +0200 |
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committer | Markus Armbruster | 2019-04-18 22:18:59 +0200 |
commit | fad866daa85c65267fa44de40f10cc1ee904ae1a (patch) | |
tree | b94800a130298a2a9f6d9f41ad5692bf5fa6964e /target/sparc | |
parent | target: Simplify how the TARGET_cpu_list() print (diff) | |
download | qemu-fad866daa85c65267fa44de40f10cc1ee904ae1a.tar.gz qemu-fad866daa85c65267fa44de40f10cc1ee904ae1a.tar.xz qemu-fad866daa85c65267fa44de40f10cc1ee904ae1a.zip |
target: Clean up how the dump_mmu() print
The various dump_mmu() take an fprintf()-like callback and a FILE * to
pass to it, and so do their helper functions. Passing around callback
and argument is rather tiresome.
Most dump_mmu() are called only by the target's hmp_info_tlb(). These
all pass monitor_printf() cast to fprintf_function and the current
monitor cast to FILE *.
SPARC's dump_mmu() gets also called from target/sparc/ldst_helper.c a
few times #ifdef DEBUG_MMU. These calls pass fprintf() and stdout.
The type-punning is technically undefined behaviour, but works in
practice. Clean up: drop the callback, and call qemu_printf()
instead.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <20190417191805.28198-11-armbru@redhat.com>
Diffstat (limited to 'target/sparc')
-rw-r--r-- | target/sparc/cpu.h | 2 | ||||
-rw-r--r-- | target/sparc/ldst_helper.c | 18 | ||||
-rw-r--r-- | target/sparc/mmu_helper.c | 97 | ||||
-rw-r--r-- | target/sparc/monitor.c | 2 |
4 files changed, 60 insertions, 59 deletions
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index ab9fa3ddbf..b298bd9c29 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -583,7 +583,7 @@ void sparc_cpu_list(void); int sparc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev); -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env); +void dump_mmu(CPUSPARCState *env); #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr, diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 5bc090213c..a7fcb84ac0 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -198,7 +198,7 @@ static void demap_tlb(SparcTLBEntry *tlb, target_ulong demap_addr, replace_tlb_entry(&tlb[i], 0, 0, env1); #ifdef DEBUG_MMU DPRINTF_MMU("%s demap invalidated entry [%02u]\n", strmmu, i); - dump_mmu(stdout, fprintf, env1); + dump_mmu(env1); #endif } } @@ -260,7 +260,7 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb, replace_tlb_entry(&tlb[i], tlb_tag, tlb_tte, env1); #ifdef DEBUG_MMU DPRINTF_MMU("%s lru replaced invalid entry [%i]\n", strmmu, i); - dump_mmu(stdout, fprintf, env1); + dump_mmu(env1); #endif return; } @@ -279,7 +279,7 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb, #ifdef DEBUG_MMU DPRINTF_MMU("%s lru replaced unlocked %s entry [%i]\n", strmmu, (replace_used ? "used" : "unused"), i); - dump_mmu(stdout, fprintf, env1); + dump_mmu(env1); #endif return; } @@ -886,7 +886,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, break; } #ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif } break; @@ -941,7 +941,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, reg, oldreg, env->mmuregs[reg]); } #ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif } break; @@ -1634,7 +1634,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, PRIx64 "\n", reg, oldreg, env->immuregs[reg]); } #ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif return; } @@ -1658,7 +1658,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, } #ifdef DEBUG_MMU DPRINTF_MMU("immu data access replaced entry [%i]\n", i); - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif return; } @@ -1718,7 +1718,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, PRIx64 "\n", reg, oldreg, env->dmmuregs[reg]); } #ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif return; } @@ -1740,7 +1740,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, } #ifdef DEBUG_MMU DPRINTF_MMU("dmmu data access replaced entry [%i]\n", i); - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif return; } diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 135a9c9d9b..afcc5b617d 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "qemu/qemu-print.h" #include "trace.h" /* Sparc MMU emulation */ @@ -320,7 +321,7 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev) return 0; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) +void dump_mmu(CPUSPARCState *env) { CPUState *cs = CPU(sparc_env_get_cpu(env)); target_ulong va, va1, va2; @@ -330,29 +331,29 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); pde = ldl_phys(cs->as, pde_ptr); - (*cpu_fprintf)(f, "Root ptr: " TARGET_FMT_plx ", ctx: %d\n", - (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]); + qemu_printf("Root ptr: " TARGET_FMT_plx ", ctx: %d\n", + (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]); for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) { pde = mmu_probe(env, va, 2); if (pde) { pa = cpu_get_phys_page_debug(cs, va); - (*cpu_fprintf)(f, "VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_plx - " PDE: " TARGET_FMT_lx "\n", va, pa, pde); + qemu_printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_plx + " PDE: " TARGET_FMT_lx "\n", va, pa, pde); for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) { pde = mmu_probe(env, va1, 1); if (pde) { pa = cpu_get_phys_page_debug(cs, va1); - (*cpu_fprintf)(f, " VA: " TARGET_FMT_lx ", PA: " - TARGET_FMT_plx " PDE: " TARGET_FMT_lx "\n", - va1, pa, pde); + qemu_printf(" VA: " TARGET_FMT_lx ", PA: " + TARGET_FMT_plx " PDE: " TARGET_FMT_lx "\n", + va1, pa, pde); for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) { pde = mmu_probe(env, va2, 0); if (pde) { pa = cpu_get_phys_page_debug(cs, va2); - (*cpu_fprintf)(f, " VA: " TARGET_FMT_lx ", PA: " - TARGET_FMT_plx " PTE: " - TARGET_FMT_lx "\n", - va2, pa, pde); + qemu_printf(" VA: " TARGET_FMT_lx ", PA: " + TARGET_FMT_plx " PTE: " + TARGET_FMT_lx "\n", + va2, pa, pde); } } } @@ -739,21 +740,21 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, return 1; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) +void dump_mmu(CPUSPARCState *env) { unsigned int i; const char *mask; - (*cpu_fprintf)(f, "MMU contexts: Primary: %" PRId64 ", Secondary: %" - PRId64 "\n", - env->dmmu.mmu_primary_context, - env->dmmu.mmu_secondary_context); - (*cpu_fprintf)(f, "DMMU Tag Access: %" PRIx64 ", TSB Tag Target: %" PRIx64 - "\n", env->dmmu.tag_access, env->dmmu.tsb_tag_target); + qemu_printf("MMU contexts: Primary: %" PRId64 ", Secondary: %" + PRId64 "\n", + env->dmmu.mmu_primary_context, + env->dmmu.mmu_secondary_context); + qemu_printf("DMMU Tag Access: %" PRIx64 ", TSB Tag Target: %" PRIx64 + "\n", env->dmmu.tag_access, env->dmmu.tsb_tag_target); if ((env->lsu & DMMU_E) == 0) { - (*cpu_fprintf)(f, "DMMU disabled\n"); + qemu_printf("DMMU disabled\n"); } else { - (*cpu_fprintf)(f, "DMMU dump\n"); + qemu_printf("DMMU dump\n"); for (i = 0; i < 64; i++) { switch (TTE_PGSIZE(env->dtlb[i].tte)) { default: @@ -771,26 +772,26 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) break; } if (TTE_IS_VALID(env->dtlb[i].tte)) { - (*cpu_fprintf)(f, "[%02u] VA: %" PRIx64 ", PA: %llx" - ", %s, %s, %s, %s, ctx %" PRId64 " %s\n", - i, - env->dtlb[i].tag & (uint64_t)~0x1fffULL, - TTE_PA(env->dtlb[i].tte), - mask, - TTE_IS_PRIV(env->dtlb[i].tte) ? "priv" : "user", - TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO", - TTE_IS_LOCKED(env->dtlb[i].tte) ? - "locked" : "unlocked", - env->dtlb[i].tag & (uint64_t)0x1fffULL, - TTE_IS_GLOBAL(env->dtlb[i].tte) ? - "global" : "local"); + qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx" + ", %s, %s, %s, %s, ctx %" PRId64 " %s\n", + i, + env->dtlb[i].tag & (uint64_t)~0x1fffULL, + TTE_PA(env->dtlb[i].tte), + mask, + TTE_IS_PRIV(env->dtlb[i].tte) ? "priv" : "user", + TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO", + TTE_IS_LOCKED(env->dtlb[i].tte) ? + "locked" : "unlocked", + env->dtlb[i].tag & (uint64_t)0x1fffULL, + TTE_IS_GLOBAL(env->dtlb[i].tte) ? + "global" : "local"); } } } if ((env->lsu & IMMU_E) == 0) { - (*cpu_fprintf)(f, "IMMU disabled\n"); + qemu_printf("IMMU disabled\n"); } else { - (*cpu_fprintf)(f, "IMMU dump\n"); + qemu_printf("IMMU dump\n"); for (i = 0; i < 64; i++) { switch (TTE_PGSIZE(env->itlb[i].tte)) { default: @@ -808,18 +809,18 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) break; } if (TTE_IS_VALID(env->itlb[i].tte)) { - (*cpu_fprintf)(f, "[%02u] VA: %" PRIx64 ", PA: %llx" - ", %s, %s, %s, ctx %" PRId64 " %s\n", - i, - env->itlb[i].tag & (uint64_t)~0x1fffULL, - TTE_PA(env->itlb[i].tte), - mask, - TTE_IS_PRIV(env->itlb[i].tte) ? "priv" : "user", - TTE_IS_LOCKED(env->itlb[i].tte) ? - "locked" : "unlocked", - env->itlb[i].tag & (uint64_t)0x1fffULL, - TTE_IS_GLOBAL(env->itlb[i].tte) ? - "global" : "local"); + qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx" + ", %s, %s, %s, ctx %" PRId64 " %s\n", + i, + env->itlb[i].tag & (uint64_t)~0x1fffULL, + TTE_PA(env->itlb[i].tte), + mask, + TTE_IS_PRIV(env->itlb[i].tte) ? "priv" : "user", + TTE_IS_LOCKED(env->itlb[i].tte) ? + "locked" : "unlocked", + env->itlb[i].tag & (uint64_t)0x1fffULL, + TTE_IS_GLOBAL(env->itlb[i].tte) ? + "global" : "local"); } } } diff --git a/target/sparc/monitor.c b/target/sparc/monitor.c index f3ca524ae9..3ec3b51a3d 100644 --- a/target/sparc/monitor.c +++ b/target/sparc/monitor.c @@ -36,7 +36,7 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) monitor_printf(mon, "No CPU available\n"); return; } - dump_mmu((FILE*)mon, (fprintf_function)monitor_printf, env1); + dump_mmu(env1); } #ifndef TARGET_SPARC64 |