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| author | Richard Henderson | 2019-04-16 08:54:54 +0200 |
|---|---|---|
| committer | Richard Henderson | 2019-04-24 22:04:33 +0200 |
| commit | 8b86d6d25807e13a63ab6ea879f976b9f18cc45a (patch) | |
| tree | f29fd7599e756b459c2fca9af822a6c151fe4ea5 /target/unicore32/translate.c | |
| parent | tcg/aarch64: Support INDEX_op_extract2_{i32,i64} (diff) | |
| download | qemu-8b86d6d25807e13a63ab6ea879f976b9f18cc45a.tar.gz qemu-8b86d6d25807e13a63ab6ea879f976b9f18cc45a.tar.xz qemu-8b86d6d25807e13a63ab6ea879f976b9f18cc45a.zip | |
tcg: Hoist max_insns computation to tb_gen_code
In order to handle TB's that translate to too much code, we
need to place the control of the length of the translation
in the hands of the code gen master loop.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/unicore32/translate.c')
| -rw-r--r-- | target/unicore32/translate.c | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/target/unicore32/translate.c b/target/unicore32/translate.c index dfe41c9069..89b02d1c3c 100644 --- a/target/unicore32/translate.c +++ b/target/unicore32/translate.c @@ -1871,14 +1871,13 @@ static void disas_uc32_insn(CPUUniCore32State *env, DisasContext *s) } /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPUUniCore32State *env = cs->env_ptr; DisasContext dc1, *dc = &dc1; target_ulong pc_start; uint32_t page_start; int num_insns; - int max_insns; /* generate intermediate code */ num_temps = 0; @@ -1897,13 +1896,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) cpu_F1d = tcg_temp_new_i64(); page_start = pc_start & TARGET_PAGE_MASK; num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } #ifndef CONFIG_USER_ONLY if ((env->uncached_asr & ASR_M) == ASR_MODE_USER) { |