summaryrefslogtreecommitdiffstats
path: root/target
diff options
context:
space:
mode:
authorChih-Min Chao2021-10-21 18:08:46 +0200
committerAlistair Francis2021-10-29 08:56:12 +0200
commit15161e425ee1bb1180f9cec574cda44fb10c0931 (patch)
tree9c90b47ae53fcb338a122b1590b6c316e4074410 /target
parentsoftfloat: add APIs to handle alternative sNaN propagation for fmax/fmin (diff)
downloadqemu-15161e425ee1bb1180f9cec574cda44fb10c0931.tar.gz
qemu-15161e425ee1bb1180f9cec574cda44fb10c0931.tar.xz
qemu-15161e425ee1bb1180f9cec574cda44fb10c0931.zip
target/riscv: change the api for RVF/RVD fmin/fmax
The sNaN propagation behavior has been changed since cd20cee7 in https://github.com/riscv/riscv-isa-manual. In Priv spec v1.10, RVF is v2.0. fmin.s and fmax.s are implemented with IEEE 754-2008 minNum and maxNum operations. In Priv spec v1.11, RVF is v2.2. fmin.s and fmax.s are amended to implement IEEE 754-2019 minimumNumber and maximumNumber operations. Therefore, to prevent the risk of having too many version variables. Instead of introducing an extra *fext_ver* variable, we tie RVF version to Priv version. Though it's not completely accurate but is close enough. Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Signed-off-by: Frank Chang <frank.chang@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20211021160847.2748577-3-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target')
-rw-r--r--target/riscv/fpu_helper.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c
index 8700516a14..d62f470900 100644
--- a/target/riscv/fpu_helper.c
+++ b/target/riscv/fpu_helper.c
@@ -174,14 +174,18 @@ uint64_t helper_fmin_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
{
float32 frs1 = check_nanbox_s(rs1);
float32 frs2 = check_nanbox_s(rs2);
- return nanbox_s(float32_minnum(frs1, frs2, &env->fp_status));
+ return nanbox_s(env->priv_ver < PRIV_VERSION_1_11_0 ?
+ float32_minnum(frs1, frs2, &env->fp_status) :
+ float32_minimum_number(frs1, frs2, &env->fp_status));
}
uint64_t helper_fmax_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
{
float32 frs1 = check_nanbox_s(rs1);
float32 frs2 = check_nanbox_s(rs2);
- return nanbox_s(float32_maxnum(frs1, frs2, &env->fp_status));
+ return nanbox_s(env->priv_ver < PRIV_VERSION_1_11_0 ?
+ float32_maxnum(frs1, frs2, &env->fp_status) :
+ float32_maximum_number(frs1, frs2, &env->fp_status));
}
uint64_t helper_fsqrt_s(CPURISCVState *env, uint64_t rs1)
@@ -283,12 +287,16 @@ uint64_t helper_fdiv_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
uint64_t helper_fmin_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
{
- return float64_minnum(frs1, frs2, &env->fp_status);
+ return env->priv_ver < PRIV_VERSION_1_11_0 ?
+ float64_minnum(frs1, frs2, &env->fp_status) :
+ float64_minimum_number(frs1, frs2, &env->fp_status);
}
uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
{
- return float64_maxnum(frs1, frs2, &env->fp_status);
+ return env->priv_ver < PRIV_VERSION_1_11_0 ?
+ float64_maxnum(frs1, frs2, &env->fp_status) :
+ float64_maximum_number(frs1, frs2, &env->fp_status);
}
uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1)