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author | Philippe Mathieu-Daudé | 2020-12-01 12:26:09 +0100 |
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committer | Philippe Mathieu-Daudé | 2020-12-13 19:58:54 +0100 |
commit | 1ab3a0de2f40f70bdfbd1a319a9734089bddcf72 (patch) | |
tree | 0ffaa723ed03ba9a90704efda5767f254b1af039 /target | |
parent | target/mips: Allow executing MSA instructions on Loongson-3A4000 (diff) | |
download | qemu-1ab3a0de2f40f70bdfbd1a319a9734089bddcf72.tar.gz qemu-1ab3a0de2f40f70bdfbd1a319a9734089bddcf72.tar.xz qemu-1ab3a0de2f40f70bdfbd1a319a9734089bddcf72.zip |
target/mips: Explicit Release 6 MMU types
As of Release 6, MMU type 4 is assigned to "Dual Variable-Page-Size
and Fixed-Page-Size TLBs" and type 2 to "Block Address Translation.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201201132817.2863301-4-f4bug@amsat.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/mips/internal.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/target/mips/internal.h b/target/mips/internal.h index 76b7a85cbb..bcd3d857ab 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -16,10 +16,11 @@ * CP0C0_MT field. */ enum mips_mmu_types { - MMU_TYPE_NONE, - MMU_TYPE_R4000, - MMU_TYPE_RESERVED, - MMU_TYPE_FMT, + MMU_TYPE_NONE = 0, + MMU_TYPE_R4000 = 1, /* Standard TLB */ + MMU_TYPE_BAT = 2, /* Block Address Translation */ + MMU_TYPE_FMT = 3, /* Fixed Mapping */ + MMU_TYPE_DVF = 4, /* Dual VTLB and FTLB */ MMU_TYPE_R3000, MMU_TYPE_R6000, MMU_TYPE_R8000 |