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author | Emilio G. Cota | 2018-03-05 23:13:30 +0100 |
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committer | Michael Tokarev | 2018-05-20 07:25:23 +0200 |
commit | 1d349821551c2da4dfefe36c6ac17319f33ebbd5 (patch) | |
tree | fc5557b4604e8bab2bbf178345a1867c024fc9bc /target | |
parent | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180518'... (diff) | |
download | qemu-1d349821551c2da4dfefe36c6ac17319f33ebbd5.tar.gz qemu-1d349821551c2da4dfefe36c6ac17319f33ebbd5.tar.xz qemu-1d349821551c2da4dfefe36c6ac17319f33ebbd5.zip |
tcg: fix s/compliment/complement/ typos
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target')
-rw-r--r-- | target/i386/translate.c | 2 | ||||
-rw-r--r-- | target/m68k/translate.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/target/i386/translate.c b/target/i386/translate.c index b0f69838f2..7c21814676 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -113,7 +113,7 @@ typedef struct DisasContext { int rex_x, rex_b; #endif int vex_l; /* vex vector length */ - int vex_v; /* vex vvvv register, without 1's compliment. */ + int vex_v; /* vex vvvv register, without 1's complement. */ int ss32; /* 32 bit stack segment */ CCOp cc_op; /* current CC operation */ bool cc_op_dirty; diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 44a0ac4e2e..8959e4d0f0 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4002,7 +4002,7 @@ DISAS_INSN(bfext_reg) TCGv shift; /* In general, we're going to rotate the field so that it's at the - top of the word and then right-shift by the compliment of the + top of the word and then right-shift by the complement of the width to extend the field. */ if (ext & 0x20) { /* Variable width. */ |