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| author | Richard Henderson | 2021-01-28 13:00:09 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-01-29 11:47:28 +0100 |
| commit | 1d51bc96cc4a9b2d31a3f4cb8442ce47753088e2 (patch) | |
| tree | e808b451b6a426c1cadec046749b37fc62af4b50 /target | |
| parent | Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-01-28' into ... (diff) | |
| download | qemu-1d51bc96cc4a9b2d31a3f4cb8442ce47753088e2.tar.gz qemu-1d51bc96cc4a9b2d31a3f4cb8442ce47753088e2.tar.xz qemu-1d51bc96cc4a9b2d31a3f4cb8442ce47753088e2.zip | |
target/arm: Implement ID_PFR2
This was defined at some point before ARMv8.4, and will
shortly be used by new processor descriptions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210120204400.1056582-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/cpu.h | 1 | ||||
| -rw-r--r-- | target/arm/helper.c | 4 | ||||
| -rw-r--r-- | target/arm/kvm64.c | 2 |
3 files changed, 5 insertions, 2 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index df0d677833..d080239863 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -922,6 +922,7 @@ struct ARMCPU { uint32_t id_mmfr4; uint32_t id_pfr0; uint32_t id_pfr1; + uint32_t id_pfr2; uint32_t mvfr0; uint32_t mvfr1; uint32_t mvfr2; diff --git a/target/arm/helper.c b/target/arm/helper.c index d2ead3fcbd..417777d4be 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7662,11 +7662,11 @@ void register_cp_regs_for_features(ARMCPU *cpu) .access = PL1_R, .type = ARM_CP_CONST, .accessfn = access_aa64_tid3, .resetvalue = 0 }, - { .name = "MVFR4_EL1_RESERVED", .state = ARM_CP_STATE_AA64, + { .name = "ID_PFR2", .state = ARM_CP_STATE_BOTH, .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 3, .opc2 = 4, .access = PL1_R, .type = ARM_CP_CONST, .accessfn = access_aa64_tid3, - .resetvalue = 0 }, + .resetvalue = cpu->isar.id_pfr2 }, { .name = "MVFR5_EL1_RESERVED", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 3, .opc2 = 5, .access = PL1_R, .type = ARM_CP_CONST, diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index f74bac2457..3c37fc4fb6 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -578,6 +578,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) ARM64_SYS_REG(3, 0, 0, 1, 0)); err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_pfr1, ARM64_SYS_REG(3, 0, 0, 1, 1)); + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_pfr2, + ARM64_SYS_REG(3, 0, 0, 3, 4)); err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_dfr0, ARM64_SYS_REG(3, 0, 0, 1, 2)); err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_mmfr0, |