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| author | Hao Wu | 2021-01-27 02:11:42 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-01-29 11:47:28 +0100 |
| commit | 1e5ce6e10a1deaec6044ba8ad75431e0424dbce9 (patch) | |
| tree | 6f2110eeb591c05111c4c95886f6d185956b99c0 /target | |
| parent | arm-virt: add secure pl061 for reset/power down (diff) | |
| download | qemu-1e5ce6e10a1deaec6044ba8ad75431e0424dbce9.tar.gz qemu-1e5ce6e10a1deaec6044ba8ad75431e0424dbce9.tar.xz qemu-1e5ce6e10a1deaec6044ba8ad75431e0424dbce9.zip | |
hw/misc: Fix arith overflow in NPCM7XX PWM module
Fix potential overflow problem when calculating pwm_duty.
1. Ensure p->cmr and p->cnr to be from [0,65535], according to the
hardware specification.
2. Changed duty to uint32_t. However, since MAX_DUTY * (p->cmr+1)
can excceed UINT32_MAX, we convert them to uint64_t in computation
and converted them back to uint32_t.
(duty is guaranteed to be <= MAX_DUTY so it won't overflow.)
Fixes: CID 1442342
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Doug Evans <dje@google.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Message-id: 20210127011142.2122790-1-wuhaotsh@google.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
0 files changed, 0 insertions, 0 deletions