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author | Richard Henderson | 2021-06-13 23:58:05 +0200 |
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committer | Richard Henderson | 2021-06-29 19:04:57 +0200 |
commit | 2b836c2ac1d040bbe2e47fd000924083fbcef414 (patch) | |
tree | 387faf2a4141c823273fb2136db536f15554d9d1 /target | |
parent | tcg: Handle new bswap flags during optimize (diff) | |
download | qemu-2b836c2ac1d040bbe2e47fd000924083fbcef414.tar.gz qemu-2b836c2ac1d040bbe2e47fd000924083fbcef414.tar.xz qemu-2b836c2ac1d040bbe2e47fd000924083fbcef414.zip |
tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64
Implement the new semantics in the fallback expansion.
Change all callers to supply the flags that keep the
semantics unchanged locally.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/translate-a64.c | 12 | ||||
-rw-r--r-- | target/arm/translate.c | 2 | ||||
-rw-r--r-- | target/i386/tcg/translate.c | 2 | ||||
-rw-r--r-- | target/mips/tcg/mxu_translate.c | 2 | ||||
-rw-r--r-- | target/s390x/translate.c | 4 | ||||
-rw-r--r-- | target/sh4/translate.c | 2 |
6 files changed, 13 insertions, 11 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 7f74d0e81a..f2641a37ba 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5437,15 +5437,15 @@ static void handle_rev32(DisasContext *s, unsigned int sf, /* bswap32_i64 requires zero high word */ tcg_gen_ext32u_i64(tcg_tmp, tcg_rn); - tcg_gen_bswap32_i64(tcg_rd, tcg_tmp); + tcg_gen_bswap32_i64(tcg_rd, tcg_tmp, TCG_BSWAP_IZ | TCG_BSWAP_OZ); tcg_gen_shri_i64(tcg_tmp, tcg_rn, 32); - tcg_gen_bswap32_i64(tcg_tmp, tcg_tmp); + tcg_gen_bswap32_i64(tcg_tmp, tcg_tmp, TCG_BSWAP_IZ | TCG_BSWAP_OZ); tcg_gen_concat32_i64(tcg_rd, tcg_rd, tcg_tmp); tcg_temp_free_i64(tcg_tmp); } else { tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rn)); - tcg_gen_bswap32_i64(tcg_rd, tcg_rd); + tcg_gen_bswap32_i64(tcg_rd, tcg_rd, TCG_BSWAP_IZ | TCG_BSWAP_OZ); } } @@ -12453,10 +12453,12 @@ static void handle_rev(DisasContext *s, int opcode, bool u, read_vec_element(s, tcg_tmp, rn, i, grp_size); switch (grp_size) { case MO_16: - tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp); + tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp, + TCG_BSWAP_IZ | TCG_BSWAP_OZ); break; case MO_32: - tcg_gen_bswap32_i64(tcg_tmp, tcg_tmp); + tcg_gen_bswap32_i64(tcg_tmp, tcg_tmp, + TCG_BSWAP_IZ | TCG_BSWAP_OZ); break; case MO_64: tcg_gen_bswap64_i64(tcg_tmp, tcg_tmp); diff --git a/target/arm/translate.c b/target/arm/translate.c index 9e2cca7707..669b0be578 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -355,7 +355,7 @@ void gen_rev16(TCGv_i32 dest, TCGv_i32 var) static void gen_revsh(TCGv_i32 dest, TCGv_i32 var) { tcg_gen_ext16u_i32(var, var); - tcg_gen_bswap16_i32(var, var); + tcg_gen_bswap16_i32(var, var, TCG_BSWAP_IZ | TCG_BSWAP_OZ); tcg_gen_ext16s_i32(dest, var); } diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index a7f5c0c8f2..e8a9dcd21a 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -7203,7 +7203,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) { gen_op_mov_v_reg(s, MO_32, s->T0, reg); tcg_gen_ext32u_tl(s->T0, s->T0); - tcg_gen_bswap32_tl(s->T0, s->T0); + tcg_gen_bswap32_tl(s->T0, s->T0, TCG_BSWAP_IZ | TCG_BSWAP_OZ); gen_op_mov_reg_v(s, MO_32, reg, s->T0); } break; diff --git a/target/mips/tcg/mxu_translate.c b/target/mips/tcg/mxu_translate.c index 963d4ba8b1..3f35e46399 100644 --- a/target/mips/tcg/mxu_translate.c +++ b/target/mips/tcg/mxu_translate.c @@ -861,7 +861,7 @@ static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx) if (sel == 1) { /* S32LDDR */ - tcg_gen_bswap32_tl(t1, t1); + tcg_gen_bswap32_tl(t1, t1, TCG_BSWAP_IZ | TCG_BSWAP_OZ); } gen_store_mxu_gpr(t1, XRa); diff --git a/target/s390x/translate.c b/target/s390x/translate.c index e243624d2a..03dab9f350 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -3939,13 +3939,13 @@ static DisasJumpType op_rosbg(DisasContext *s, DisasOps *o) static DisasJumpType op_rev16(DisasContext *s, DisasOps *o) { - tcg_gen_bswap16_i64(o->out, o->in2); + tcg_gen_bswap16_i64(o->out, o->in2, TCG_BSWAP_IZ | TCG_BSWAP_OZ); return DISAS_NEXT; } static DisasJumpType op_rev32(DisasContext *s, DisasOps *o) { - tcg_gen_bswap32_i64(o->out, o->in2); + tcg_gen_bswap32_i64(o->out, o->in2, TCG_BSWAP_IZ | TCG_BSWAP_OZ); return DISAS_NEXT; } diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 9312790623..147219759b 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -677,7 +677,7 @@ static void _decode_opc(DisasContext * ctx) { TCGv low = tcg_temp_new(); tcg_gen_ext16u_i32(low, REG(B7_4)); - tcg_gen_bswap16_i32(low, low); + tcg_gen_bswap16_i32(low, low, TCG_BSWAP_IZ | TCG_BSWAP_OZ); tcg_gen_deposit_i32(REG(B11_8), REG(B7_4), low, 0, 16); tcg_temp_free(low); } |