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| author | Lucas Coutinho | 2022-07-01 15:35:01 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza | 2022-07-18 18:59:43 +0200 |
| commit | 2bfcb7a3160878ca04f2e49d85854c56974194a5 (patch) | |
| tree | 932927f2cb125a6c3abed56231fe161e3a12ebc7 /target | |
| parent | target/ppc: Move slbieg to decodetree (diff) | |
| download | qemu-2bfcb7a3160878ca04f2e49d85854c56974194a5.tar.gz qemu-2bfcb7a3160878ca04f2e49d85854c56974194a5.tar.xz qemu-2bfcb7a3160878ca04f2e49d85854c56974194a5.zip | |
target/ppc: Move slbia to decodetree
Reviewed-by: Leandro Lupori <leandro.lupori@eldorado.org.br>
Signed-off-by: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
Message-Id: <20220701133507.740619-6-lucas.coutinho@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/helper.h | 2 | ||||
| -rw-r--r-- | target/ppc/insn32.decode | 5 | ||||
| -rw-r--r-- | target/ppc/mmu-hash64.c | 2 | ||||
| -rw-r--r-- | target/ppc/translate.c | 17 | ||||
| -rw-r--r-- | target/ppc/translate/storage-ctrl-impl.c.inc | 14 |
5 files changed, 21 insertions, 19 deletions
diff --git a/target/ppc/helper.h b/target/ppc/helper.h index e5e59d1924..c243d9550a 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -680,7 +680,7 @@ DEF_HELPER_FLAGS_3(store_slb, TCG_CALL_NO_RWG, void, env, tl, tl) DEF_HELPER_2(load_slb_esid, tl, env, tl) DEF_HELPER_2(load_slb_vsid, tl, env, tl) DEF_HELPER_2(find_slb_vsid, tl, env, tl) -DEF_HELPER_FLAGS_2(slbia, TCG_CALL_NO_RWG, void, env, i32) +DEF_HELPER_FLAGS_2(SLBIA, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(SLBIE, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(SLBIEG, TCG_CALL_NO_RWG, void, env, tl) #endif diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 9df73ce30f..0e214b359c 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -146,6 +146,9 @@ &X_imm8 xt imm:uint8_t @X_imm8 ...... ..... .. imm:8 .......... . &X_imm8 xt=%x_xt +&X_ih ih:uint8_t +@X_ih ...... .. ih:3 ..... ..... .......... . &X_ih + &X_rb rb @X_rb ...... ..... ..... rb:5 .......... . &X_rb @@ -865,6 +868,8 @@ VMODUQ 000100 ..... ..... ..... 11000001011 @VX SLBIE 011111 ----- ----- ..... 0110110010 - @X_rb SLBIEG 011111 ..... ----- ..... 0111010010 - @X_tb +SLBIA 011111 --... ----- ----- 0111110010 - @X_ih + ## TLB Management Instructions &X_tlbie rb rs ric prs:bool r:bool diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index a842fbd6f6..dd2c7e588f 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -101,7 +101,7 @@ void dump_slb(PowerPCCPU *cpu) } #ifdef CONFIG_TCG -void helper_slbia(CPUPPCState *env, uint32_t ih) +void helper_SLBIA(CPUPPCState *env, uint32_t ih) { PowerPCCPU *cpu = env_archcpu(env); int starting_entry; diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 591b6dc817..4435865388 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -5450,22 +5450,6 @@ static void gen_tlbsync(DisasContext *ctx) } #if defined(TARGET_PPC64) -/* slbia */ -static void gen_slbia(DisasContext *ctx) -{ -#if defined(CONFIG_USER_ONLY) - GEN_PRIV(ctx); -#else - uint32_t ih = (ctx->opcode >> 21) & 0x7; - TCGv_i32 t0 = tcg_const_i32(ih); - - CHK_SV(ctx); - - gen_helper_slbia(cpu_env, t0); - tcg_temp_free_i32(t0); -#endif /* defined(CONFIG_USER_ONLY) */ -} - /* slbsync */ static void gen_slbsync(DisasContext *ctx) { @@ -6869,7 +6853,6 @@ GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA), */ GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC), #if defined(TARGET_PPC64) -GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x031FFC01, PPC_SLBI), GEN_HANDLER_E(slbsync, 0x1F, 0x12, 0x0A, 0x03FFF801, PPC_NONE, PPC2_ISA300), #endif GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN), diff --git a/target/ppc/translate/storage-ctrl-impl.c.inc b/target/ppc/translate/storage-ctrl-impl.c.inc index d699a370f5..c454ce8c7f 100644 --- a/target/ppc/translate/storage-ctrl-impl.c.inc +++ b/target/ppc/translate/storage-ctrl-impl.c.inc @@ -51,6 +51,20 @@ static bool trans_SLBIEG(DisasContext *ctx, arg_SLBIEG *a) return true; } +static bool trans_SLBIA(DisasContext *ctx, arg_SLBIA *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_INSNS_FLAGS(ctx, SLBI); + REQUIRE_SV(ctx); + +#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64) + gen_helper_SLBIA(cpu_env, tcg_constant_i32(a->ih)); +#else + qemu_build_not_reached(); +#endif + return true; +} + static bool do_tlbie(DisasContext *ctx, arg_X_tlbie *a, bool local) { #if defined(CONFIG_USER_ONLY) |