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| author | Leon Alrae | 2014-12-10 13:36:39 +0100 |
|---|---|---|
| committer | Yongbok Kim | 2017-08-02 23:18:11 +0200 |
| commit | 2d1847ec1ca47fe82f1d8122409cedffdd3925d5 (patch) | |
| tree | 6e4a7fff26ff5c1e614ef891923c6c5509c5ecc7 /target | |
| parent | mips: Add KVM T&E segment support for TCG (diff) | |
| download | qemu-2d1847ec1ca47fe82f1d8122409cedffdd3925d5.tar.gz qemu-2d1847ec1ca47fe82f1d8122409cedffdd3925d5.tar.xz qemu-2d1847ec1ca47fe82f1d8122409cedffdd3925d5.zip | |
target-mips: apply CP0.PageMask before writing into TLB entry
PFN0 and PFN1 have to be masked out with PageMask_Mask.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
[Yongbok Kim:
Added commit message]
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/mips/op_helper.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 526f8e4969..320f2b0dc4 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -2008,6 +2008,7 @@ static inline uint64_t get_tlb_pfn_from_entrylo(uint64_t entrylo) static void r4k_fill_tlb(CPUMIPSState *env, int idx) { r4k_tlb_t *tlb; + uint64_t mask = env->CP0_PageMask >> (TARGET_PAGE_BITS + 1); /* XXX: detect conflicting TLBs and raise a MCHECK exception when needed */ tlb = &env->tlb->mmu.r4k.tlb[idx]; @@ -2028,13 +2029,13 @@ static void r4k_fill_tlb(CPUMIPSState *env, int idx) tlb->C0 = (env->CP0_EntryLo0 >> 3) & 0x7; tlb->XI0 = (env->CP0_EntryLo0 >> CP0EnLo_XI) & 1; tlb->RI0 = (env->CP0_EntryLo0 >> CP0EnLo_RI) & 1; - tlb->PFN[0] = get_tlb_pfn_from_entrylo(env->CP0_EntryLo0) << 12; + tlb->PFN[0] = (get_tlb_pfn_from_entrylo(env->CP0_EntryLo0) & ~mask) << 12; tlb->V1 = (env->CP0_EntryLo1 & 2) != 0; tlb->D1 = (env->CP0_EntryLo1 & 4) != 0; tlb->C1 = (env->CP0_EntryLo1 >> 3) & 0x7; tlb->XI1 = (env->CP0_EntryLo1 >> CP0EnLo_XI) & 1; tlb->RI1 = (env->CP0_EntryLo1 >> CP0EnLo_RI) & 1; - tlb->PFN[1] = get_tlb_pfn_from_entrylo(env->CP0_EntryLo1) << 12; + tlb->PFN[1] = (get_tlb_pfn_from_entrylo(env->CP0_EntryLo1) & ~mask) << 12; } void r4k_helper_tlbinv(CPUMIPSState *env) |