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| author | Lucas Coutinho | 2022-07-01 15:34:59 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza | 2022-07-18 18:59:43 +0200 |
| commit | 43507e47e14e92e4460fdd29cf9f3798b401589f (patch) | |
| tree | 1fb8f500894f10ea72feba5523e098a62f2fab8f /target | |
| parent | target/ppc: add macros to check privilege level (diff) | |
| download | qemu-43507e47e14e92e4460fdd29cf9f3798b401589f.tar.gz qemu-43507e47e14e92e4460fdd29cf9f3798b401589f.tar.xz qemu-43507e47e14e92e4460fdd29cf9f3798b401589f.zip | |
target/ppc: Move slbie to decodetree
Reviewed-by: Leandro Lupori <leandro.lupori@eldorado.org.br>
Signed-off-by: Lucas Coutinho <lucas.coutinho@eldorado.org.br>
Message-Id: <20220701133507.740619-4-lucas.coutinho@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/helper.h | 2 | ||||
| -rw-r--r-- | target/ppc/insn32.decode | 7 | ||||
| -rw-r--r-- | target/ppc/mmu-hash64.c | 2 | ||||
| -rw-r--r-- | target/ppc/translate.c | 13 | ||||
| -rw-r--r-- | target/ppc/translate/storage-ctrl-impl.c.inc | 14 |
5 files changed, 23 insertions, 15 deletions
diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 294ef1396b..7c93037257 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -681,7 +681,7 @@ DEF_HELPER_2(load_slb_esid, tl, env, tl) DEF_HELPER_2(load_slb_vsid, tl, env, tl) DEF_HELPER_2(find_slb_vsid, tl, env, tl) DEF_HELPER_FLAGS_2(slbia, TCG_CALL_NO_RWG, void, env, i32) -DEF_HELPER_FLAGS_2(slbie, TCG_CALL_NO_RWG, void, env, tl) +DEF_HELPER_FLAGS_2(SLBIE, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(slbieg, TCG_CALL_NO_RWG, void, env, tl) #endif DEF_HELPER_FLAGS_2(load_sr, TCG_CALL_NO_RWG, tl, env, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 092e01113f..0fe6c33805 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -146,6 +146,9 @@ &X_imm8 xt imm:uint8_t @X_imm8 ...... ..... .. imm:8 .......... . &X_imm8 xt=%x_xt +&X_rb rb +@X_rb ...... ..... ..... rb:5 .......... . &X_rb + &X_uim5 xt uim:uint8_t @X_uim5 ...... ..... ..... uim:5 .......... . &X_uim5 xt=%x_xt @@ -857,6 +860,10 @@ VMODUD 000100 ..... ..... ..... 11011001011 @VX VMODSQ 000100 ..... ..... ..... 11100001011 @VX VMODUQ 000100 ..... ..... ..... 11000001011 @VX +## SLB Management Instructions + +SLBIE 011111 ----- ----- ..... 0110110010 - @X_rb + ## TLB Management Instructions &X_tlbie rb rs ric prs:bool r:bool diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index da9fe99ff8..03f71a82ec 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -197,7 +197,7 @@ static void __helper_slbie(CPUPPCState *env, target_ulong addr, } } -void helper_slbie(CPUPPCState *env, target_ulong addr) +void helper_SLBIE(CPUPPCState *env, target_ulong addr) { __helper_slbie(env, addr, false); } diff --git a/target/ppc/translate.c b/target/ppc/translate.c index e373c39fc8..244eefd965 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -5466,18 +5466,6 @@ static void gen_slbia(DisasContext *ctx) #endif /* defined(CONFIG_USER_ONLY) */ } -/* slbie */ -static void gen_slbie(DisasContext *ctx) -{ -#if defined(CONFIG_USER_ONLY) - GEN_PRIV(ctx); -#else - CHK_SV(ctx); - - gen_helper_slbie(cpu_env, cpu_gpr[rB(ctx->opcode)]); -#endif /* defined(CONFIG_USER_ONLY) */ -} - /* slbieg */ static void gen_slbieg(DisasContext *ctx) { @@ -6894,7 +6882,6 @@ GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA), GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC), #if defined(TARGET_PPC64) GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x031FFC01, PPC_SLBI), -GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI), GEN_HANDLER_E(slbieg, 0x1F, 0x12, 0x0E, 0x001F0001, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(slbsync, 0x1F, 0x12, 0x0A, 0x03FFF801, PPC_NONE, PPC2_ISA300), #endif diff --git a/target/ppc/translate/storage-ctrl-impl.c.inc b/target/ppc/translate/storage-ctrl-impl.c.inc index 467c390888..3fa64be067 100644 --- a/target/ppc/translate/storage-ctrl-impl.c.inc +++ b/target/ppc/translate/storage-ctrl-impl.c.inc @@ -23,6 +23,20 @@ #include "mmu-book3s-v3.h" +static bool trans_SLBIE(DisasContext *ctx, arg_SLBIE *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_INSNS_FLAGS(ctx, SLBI); + REQUIRE_SV(ctx); + +#if !defined(CONFIG_USER_ONLY) && defined(TARGET_PPC64) + gen_helper_SLBIE(cpu_env, cpu_gpr[a->rb]); +#else + qemu_build_not_reached(); +#endif + return true; +} + static bool do_tlbie(DisasContext *ctx, arg_X_tlbie *a, bool local) { #if defined(CONFIG_USER_ONLY) |