summaryrefslogtreecommitdiffstats
path: root/target
diff options
context:
space:
mode:
authorMichael Clark2018-03-02 13:31:11 +0100
committerMichael Clark2018-03-06 20:30:28 +0100
commit47ae93cdfedc683c56e19113d516d7ce4971c8e6 (patch)
tree713240f8392d981ec9b11893d603475f7a5dcfa5 /target
parentRISC-V Physical Memory Protection (diff)
downloadqemu-47ae93cdfedc683c56e19113d516d7ce4971c8e6.tar.gz
qemu-47ae93cdfedc683c56e19113d516d7ce4971c8e6.tar.xz
qemu-47ae93cdfedc683c56e19113d516d7ce4971c8e6.zip
RISC-V Linux User Emulation
Implementation of linux user emulation for RISC-V. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
Diffstat (limited to 'target')
-rw-r--r--target/riscv/cpu_user.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/target/riscv/cpu_user.h b/target/riscv/cpu_user.h
new file mode 100644
index 0000000000..c2199610ab
--- /dev/null
+++ b/target/riscv/cpu_user.h
@@ -0,0 +1,13 @@
+#define xRA 1 /* return address (aka link register) */
+#define xSP 2 /* stack pointer */
+#define xGP 3 /* global pointer */
+#define xTP 4 /* thread pointer */
+
+#define xA0 10 /* gpr[10-17] are syscall arguments */
+#define xA1 11
+#define xA2 12
+#define xA3 13
+#define xA4 14
+#define xA5 15
+#define xA6 16
+#define xA7 17 /* syscall number goes here */