diff options
| author | Aurelien Jarno | 2017-05-01 23:20:43 +0200 |
|---|---|---|
| committer | Aurelien Jarno | 2017-05-13 11:18:22 +0200 |
| commit | 632056651a038e85ea9b62f1ad63a98c929ee40f (patch) | |
| tree | 80c9ba15366fc004ef04acff48891e0ca235aabf /target | |
| parent | target/sh4: fix BS_STOP exit (diff) | |
| download | qemu-632056651a038e85ea9b62f1ad63a98c929ee40f.tar.gz qemu-632056651a038e85ea9b62f1ad63a98c929ee40f.tar.xz qemu-632056651a038e85ea9b62f1ad63a98c929ee40f.zip | |
target/sh4: fix BS_EXCP exit
In case of exception, there is no need to call tcg_gen_exit_tb as the
exception helper won't return.
Also fix a few cases where BS_BRANCH is called instead of BS_EXCP.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target')
| -rw-r--r-- | target/sh4/translate.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 04bc18bf7c..f608e314b6 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -339,7 +339,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg) if (ctx->envflags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { \ tcg_gen_movi_i32(cpu_pc, ctx->pc); \ gen_helper_raise_slot_illegal_instruction(cpu_env); \ - ctx->bstate = BS_BRANCH; \ + ctx->bstate = BS_EXCP; \ return; \ } @@ -351,7 +351,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg) } else { \ gen_helper_raise_illegal_instruction(cpu_env); \ } \ - ctx->bstate = BS_BRANCH; \ + ctx->bstate = BS_EXCP; \ return; \ } @@ -363,7 +363,7 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg) } else { \ gen_helper_raise_fpu_disable(cpu_env); \ } \ - ctx->bstate = BS_BRANCH; \ + ctx->bstate = BS_EXCP; \ return; \ } @@ -1289,7 +1289,7 @@ static void _decode_opc(DisasContext * ctx) imm = tcg_const_i32(B7_0); gen_helper_trapa(cpu_env, imm); tcg_temp_free(imm); - ctx->bstate = BS_BRANCH; + ctx->bstate = BS_EXCP; } return; case 0xc800: /* tst #imm,R0 */ @@ -1798,7 +1798,7 @@ static void _decode_opc(DisasContext * ctx) } else { gen_helper_raise_illegal_instruction(cpu_env); } - ctx->bstate = BS_BRANCH; + ctx->bstate = BS_EXCP; } static void decode_opc(DisasContext * ctx) @@ -1867,7 +1867,7 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb) /* We have hit a breakpoint - make sure PC is up-to-date */ tcg_gen_movi_i32(cpu_pc, ctx.pc); gen_helper_debug(cpu_env); - ctx.bstate = BS_BRANCH; + ctx.bstate = BS_EXCP; /* The address covered by the breakpoint must be included in [tb->pc, tb->pc + tb->size) in order to for it to be properly cleared -- thus we increment the PC here so that @@ -1911,9 +1911,7 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb) gen_goto_tb(&ctx, 0, ctx.pc); break; case BS_EXCP: - /* gen_op_interrupt_restart(); */ - tcg_gen_exit_tb(0); - break; + /* fall through */ case BS_BRANCH: default: break; |