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authorPeter Maydell2017-11-13 11:05:18 +0100
committerPeter Maydell2017-11-13 11:05:18 +0100
commit6b8d0ac0315f7ecfa41ebdc1467410a4d3342326 (patch)
treef32fadf6af296888bb3bb7ec0be7bcfb6e5d64ba /target
parentMerge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ... (diff)
parentMakefile: Capstone: Add support for cross compile ranlib (diff)
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Merge remote-tracking branch 'remotes/rth/tags/pull-cap-20171109' into staging
Capstone fixes for 2.11 # gpg: Signature made Thu 09 Nov 2017 07:49:25 GMT # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-cap-20171109: Makefile: Capstone: Add support for cross compile ranlib disas: Dump insn bytes along with capstone disassembly Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/cpu.c6
-rw-r--r--target/i386/cpu.c2
2 files changed, 8 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 47c8b2a85c..7f7a3d1e32 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -489,13 +489,19 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
info->print_insn = print_insn_arm_a64;
#endif
info->cap_arch = CS_ARCH_ARM64;
+ info->cap_insn_unit = 4;
+ info->cap_insn_split = 4;
} else {
int cap_mode;
if (env->thumb) {
info->print_insn = print_insn_thumb1;
+ info->cap_insn_unit = 2;
+ info->cap_insn_split = 4;
cap_mode = CS_MODE_THUMB;
} else {
info->print_insn = print_insn_arm;
+ info->cap_insn_unit = 4;
+ info->cap_insn_split = 4;
cap_mode = CS_MODE_ARM;
}
if (arm_feature(env, ARM_FEATURE_V8)) {
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6f21a5e518..1edcf29e27 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4109,6 +4109,8 @@ static void x86_disas_set_info(CPUState *cs, disassemble_info *info)
info->cap_mode = (env->hflags & HF_CS64_MASK ? CS_MODE_64
: env->hflags & HF_CS32_MASK ? CS_MODE_32
: CS_MODE_16);
+ info->cap_insn_unit = 1;
+ info->cap_insn_split = 8;
}
static Property x86_cpu_properties[] = {