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| author | Richard Henderson | 2019-09-21 06:32:55 +0200 |
|---|---|---|
| committer | Alex Bennée | 2019-09-26 20:00:53 +0200 |
| commit | 8009307031affdd0311750d9b5684f6d5a908ab9 (patch) | |
| tree | 352d4041c2d684a3b8c02caaed672ff4614a4136 /target | |
| parent | target/alpha: Write to fpcr_flush_to_zero once (diff) | |
| download | qemu-8009307031affdd0311750d9b5684f6d5a908ab9.tar.gz qemu-8009307031affdd0311750d9b5684f6d5a908ab9.tar.xz qemu-8009307031affdd0311750d9b5684f6d5a908ab9.zip | |
target/alpha: Mask IOV exception with INV for user-only
The kernel masks the integer overflow exception with the
software invalid exception mask. Include IOV in the set
of exception bits masked by fpcr_exc_enable.
Fixes the new float_convs test.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190921043256.4575-7-richard.henderson@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/alpha/helper.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 1b3479738b..55d7274d94 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -58,6 +58,13 @@ void cpu_alpha_store_fpcr(CPUAlphaState *env, uint64_t val) */ uint32_t soft_fpcr = alpha_ieee_swcr_to_fpcr(env->swcr) >> 32; fpcr |= soft_fpcr & (FPCR_STATUS_MASK | FPCR_DNZ); + + /* + * The IOV exception is disabled by the kernel with SWCR_TRAP_ENABLE_INV, + * which got mapped by alpha_ieee_swcr_to_fpcr to FPCR_INVD. + * Add FPCR_IOV to fpcr_exc_enable so that it is handled identically. + */ + t |= CONVERT_BIT(soft_fpcr, FPCR_INVD, FPCR_IOV); #endif t |= CONVERT_BIT(fpcr, FPCR_INED, FPCR_INE); |