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| author | Víctor Colombo | 2022-09-06 14:55:20 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza | 2022-09-20 15:54:06 +0200 |
| commit | 9f097daa5483cdb7d745740606232c931d32b796 (patch) | |
| tree | bc33f40bd2fd2077dafdbb0c7674073bc5caff89 /target | |
| parent | target/ppc: Set result to QNaN for DENBCD when VXCVI occurs (diff) | |
| download | qemu-9f097daa5483cdb7d745740606232c931d32b796.tar.gz qemu-9f097daa5483cdb7d745740606232c931d32b796.tar.xz qemu-9f097daa5483cdb7d745740606232c931d32b796.zip | |
target/ppc: Zero second doubleword for VSX madd instructions
In 205eb5a89e we updated most VSX instructions to zero the
second doubleword, as is requested by PowerISA since v3.1.
However, VSX_MADD helper was left behind unchanged, while it
is also affected and should be fixed as well.
This patch applies the fix for MADD instructions.
Fixes: 205eb5a89e ("target/ppc: Change VSX instructions behavior to fill with zeros")
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-6-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/fpu_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 32995179b5..f07330ffc1 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -2167,7 +2167,7 @@ VSX_TSQRT(xvtsqrtsp, 4, float32, VsrW(i), -126, 23) void helper_##op(CPUPPCState *env, ppc_vsr_t *xt, \ ppc_vsr_t *s1, ppc_vsr_t *s2, ppc_vsr_t *s3) \ { \ - ppc_vsr_t t = *xt; \ + ppc_vsr_t t = { }; \ int i; \ \ helper_reset_fpstatus(env); \ |