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authorFrank Chang2020-07-10 12:48:17 +0200
committerAlistair Francis2020-07-14 02:25:37 +0200
commita69f97c1110205bc173657c77ce2d16877cad683 (patch)
tree1fe328f17f776455b3e890b7de378b063961fd28 /target
parenttarget/riscv: correct the gvec IR called in gen_vec_rsub16_i64() (diff)
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target/riscv: fix return value of do_opivx_widen()
do_opivx_widen() should return false if check function returns false. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200710104920.13550-4-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target')
-rw-r--r--target/riscv/insn_trans/trans_rvv.inc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/insn_trans/trans_rvv.inc.c b/target/riscv/insn_trans/trans_rvv.inc.c
index 7cd08f0868..c0b7375927 100644
--- a/target/riscv/insn_trans/trans_rvv.inc.c
+++ b/target/riscv/insn_trans/trans_rvv.inc.c
@@ -1151,7 +1151,7 @@ static bool do_opivx_widen(DisasContext *s, arg_rmrr *a,
if (opivx_widen_check(s, a)) {
return opivx_trans(a->rd, a->rs1, a->rs2, a->vm, fn, s);
}
- return true;
+ return false;
}
#define GEN_OPIVX_WIDEN_TRANS(NAME) \