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| author | Giuseppe Musacchio | 2020-06-25 11:12:03 +0200 |
|---|---|---|
| committer | Laurent Vivier | 2020-06-29 12:59:50 +0200 |
| commit | aa04c9d9ef962d516af5ca89667de4282d1c22ef (patch) | |
| tree | 92f95f76ad1a6deae938cbe075853225b32ab806 /target | |
| parent | Merge remote-tracking branch 'remotes/amarkovic/tags/mips-gsoc-queue-jun-27-2... (diff) | |
| download | qemu-aa04c9d9ef962d516af5ca89667de4282d1c22ef.tar.gz qemu-aa04c9d9ef962d516af5ca89667de4282d1c22ef.tar.xz qemu-aa04c9d9ef962d516af5ca89667de4282d1c22ef.zip | |
target/sparc: Translate flushw opcode
The ifdef logic should unconditionally compile in the `xop == 0x2b` case
when targeting sparc64.
Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200625091204.3186186-2-laurent@vivier.eu>
Diffstat (limited to 'target')
| -rw-r--r-- | target/sparc/translate.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 9416a551cf..1a4efd4ed6 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -3663,6 +3663,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) #endif gen_store_gpr(dc, rd, cpu_tmp0); break; +#endif +#if defined(TARGET_SPARC64) || !defined(CONFIG_USER_ONLY) } else if (xop == 0x2b) { /* rdtbr / V9 flushw */ #ifdef TARGET_SPARC64 gen_helper_flushw(cpu_env); |