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authorBin Meng2022-03-22 10:50:04 +0100
committerRichard Henderson2022-06-20 22:11:36 +0200
commitadb5974dcc5ee7fe122c74fb85d3bae331101ec3 (patch)
treedf50784be9bb4e3c3aeb0f52d025ecc980e96f48 /target
parenttcg/ppc: implement rem[u]_i{32,64} with mod[su][wd] (diff)
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target/avr: Drop avr_cpu_memory_rw_debug()
CPUClass::memory_rw_debug() holds a callback for GDB memory access. If not provided, cpu_memory_rw_debug() is used by the GDB stub. Drop avr_cpu_memory_rw_debug() which does nothing special. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220322095004.70682-1-bmeng.cn@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/avr/cpu.c1
-rw-r--r--target/avr/cpu.h2
-rw-r--r--target/avr/helper.c6
3 files changed, 0 insertions, 9 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 5d70e34dd5..05b992ff73 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -214,7 +214,6 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
cc->has_work = avr_cpu_has_work;
cc->dump_state = avr_cpu_dump_state;
cc->set_pc = avr_cpu_set_pc;
- cc->memory_rw_debug = avr_cpu_memory_rw_debug;
dc->vmsd = &vms_avr_cpu;
cc->sysemu_ops = &avr_sysemu_ops;
cc->disas_set_info = avr_cpu_disas_set_info;
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index d304f33301..96419c0c2b 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -184,8 +184,6 @@ void avr_cpu_tcg_init(void);
void avr_cpu_list(void);
int cpu_avr_exec(CPUState *cpu);
-int avr_cpu_memory_rw_debug(CPUState *cs, vaddr address, uint8_t *buf,
- int len, bool is_write);
enum {
TB_FLAGS_FULL_ACCESS = 1,
diff --git a/target/avr/helper.c b/target/avr/helper.c
index c27f702901..db76452f9a 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -93,12 +93,6 @@ void avr_cpu_do_interrupt(CPUState *cs)
cs->exception_index = -1;
}
-int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf,
- int len, bool is_write)
-{
- return cpu_memory_rw_debug(cs, addr, buf, len, is_write);
-}
-
hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
return addr; /* I assume 1:1 address correspondence */