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| author | Andrew Jones | 2017-03-14 12:28:54 +0100 |
|---|---|---|
| committer | Peter Maydell | 2017-03-14 12:28:54 +0100 |
| commit | d5affb0d8677e1a8a8fe03fa25005b669e7cdc02 (patch) | |
| tree | 20c2ba87a3e54c70f476d40a20484f756df23fd4 /target | |
| parent | target/arm: implement armv8 PMUSERENR (user-mode enable bits) (diff) | |
| download | qemu-d5affb0d8677e1a8a8fe03fa25005b669e7cdc02.tar.gz qemu-d5affb0d8677e1a8a8fe03fa25005b669e7cdc02.tar.xz qemu-d5affb0d8677e1a8a8fe03fa25005b669e7cdc02.zip | |
target/arm/arm-powerctl: Fix psci info return values
The power state spec section 5.1.5 AFFINITY_INFO defines the
affinity info return values as
0 ON
1 OFF
2 ON_PENDING
I grepped QEMU for power_state to ensure that no assumptions
of OFF=0 were being made.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-id: 20170303123232.4967-1-drjones@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/cpu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 25ceaabb5d..a8aabce7dd 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -536,8 +536,8 @@ typedef void ARMELChangeHook(ARMCPU *cpu, void *opaque); /* These values map onto the return values for * QEMU_PSCI_0_2_FN_AFFINITY_INFO */ typedef enum ARMPSCIState { - PSCI_OFF = 0, - PSCI_ON = 1, + PSCI_ON = 0, + PSCI_OFF = 1, PSCI_ON_PENDING = 2 } ARMPSCIState; |