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authorMark Cave-Ayland2021-03-08 13:11:53 +0100
committerLaurent Vivier2021-03-11 21:12:32 +0100
commitd6cbd8f7a19e6f0fd22a598aad992c4913f481f2 (patch)
treefd17ab2c0201138c80b974143eb622365c65ceb5 /target
parenttarget/m68k: implement rtr instruction (diff)
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target/m68k: don't set SSW ATC bit for physical bus errors
If a NuBus slot doesn't contain a card, the Quadra hardware generates a physical bus error if the CPU attempts to access the slot address space. Both Linux and MacOS use a separate bus error handler during NuBus accesses in order to detect and recover when addressing empty slots. According to the MC68040 users manual the ATC bit of the SSW is used to distinguish between ATC faults and physical bus errors. MacOS specifically checks the stack frame generated by a NuBus error and panics if the SSW ATC bit is set. Update m68k_cpu_transaction_failed() so that the SSW ATC bit is not set if the memory API returns MEMTX_DECODE_ERROR which will be used to indicate that an access to an empty NuBus slot occurred. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210308121155.2476-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target')
-rw-r--r--target/m68k/op_helper.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index 730cdf7744..5f981e5bf6 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -468,7 +468,17 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
if (m68k_feature(env, M68K_FEATURE_M68040)) {
env->mmu.mmusr = 0;
- env->mmu.ssw |= M68K_ATC_040;
+
+ /*
+ * According to the MC68040 users manual the ATC bit of the SSW is
+ * used to distinguish between ATC faults and physical bus errors.
+ * In the case of a bus error e.g. during nubus read from an empty
+ * slot this bit should not be set
+ */
+ if (response != MEMTX_DECODE_ERROR) {
+ env->mmu.ssw |= M68K_ATC_040;
+ }
+
/* FIXME: manage MMU table access error */
env->mmu.ssw &= ~M68K_TM_040;
if (env->sr & SR_S) { /* SUPERVISOR */