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authorRichard Henderson2020-09-16 03:41:02 +0200
committerPeter Maydell2020-10-01 16:31:00 +0200
commitd8227b098301935ea8e0e032e7d41e5dc3e97590 (patch)
tree9b47ad18e13fa824ea174d0b7516f5bdf642b420 /target
parenttarget/arm: Make isar_feature_aa32_fp16_arith() handle M-profile (diff)
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target/arm: Fix sve ldr/str
The mte update missed a bit when producing clean addresses. Fixes: b2aa8879b88 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200916014102.2446323-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
-rw-r--r--target/arm/translate-sve.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index e4cd6b6251..c0d8a5863a 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -4290,7 +4290,7 @@ static void do_ldr(DisasContext *s, uint32_t vofs, int len, int rn, int imm)
for (i = 0; i < len_align; i += 8) {
tcg_gen_qemu_ld_i64(t0, clean_addr, midx, MO_LEQ);
tcg_gen_st_i64(t0, cpu_env, vofs + i);
- tcg_gen_addi_i64(clean_addr, cpu_reg_sp(s, rn), 8);
+ tcg_gen_addi_i64(clean_addr, clean_addr, 8);
}
tcg_temp_free_i64(t0);
} else {
@@ -4379,7 +4379,7 @@ static void do_str(DisasContext *s, uint32_t vofs, int len, int rn, int imm)
for (i = 0; i < len_align; i += 8) {
tcg_gen_ld_i64(t0, cpu_env, vofs + i);
tcg_gen_qemu_st_i64(t0, clean_addr, midx, MO_LEQ);
- tcg_gen_addi_i64(clean_addr, cpu_reg_sp(s, rn), 8);
+ tcg_gen_addi_i64(clean_addr, clean_addr, 8);
}
tcg_temp_free_i64(t0);
} else {