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| author | Richard Henderson | 2020-02-08 13:58:16 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-13 15:14:55 +0100 |
| commit | e11f0eb6724571adb812a3ce5269c41586e0262b (patch) | |
| tree | 5c1c7b0bca2801e4c2bafa0b7f0d4ea84aacaf45 /target | |
| parent | target/arm: Implement UAO semantics (diff) | |
| download | qemu-e11f0eb6724571adb812a3ce5269c41586e0262b.tar.gz qemu-e11f0eb6724571adb812a3ce5269c41586e0262b.tar.xz qemu-e11f0eb6724571adb812a3ce5269c41586e0262b.zip | |
target/arm: Enable ARMv8.2-UAO in -cpu max
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200208125816.14954-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/cpu64.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 57fbc5eade..1359564c55 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -676,6 +676,10 @@ static void aarch64_max_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */ cpu->isar.id_aa64mmfr1 = t; + t = cpu->isar.id_aa64mmfr2; + t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); + cpu->isar.id_aa64mmfr2 = t; + /* Replicate the same data to the 32-bit id registers. */ u = cpu->isar.id_isar5; u = FIELD_DP32(u, ID_ISAR5, AES, 2); /* AES + PMULL */ |