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author | Peter Maydell | 2017-12-13 18:59:23 +0100 |
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committer | Peter Maydell | 2017-12-13 18:59:23 +0100 |
commit | ec8e3340286a87d3924c223d60ba5c994549f796 (patch) | |
tree | d1e39740c5de3330582eea5e3bf364ce8143a2f3 /target | |
parent | target/arm: Split M profile MNegPri mmu index into user and priv (diff) | |
download | qemu-ec8e3340286a87d3924c223d60ba5c994549f796.tar.gz qemu-ec8e3340286a87d3924c223d60ba5c994549f796.tar.xz qemu-ec8e3340286a87d3924c223d60ba5c994549f796.zip |
target/arm: Create new arm_v7m_mmu_idx_for_secstate_and_priv()
The TT instruction is going to need to look up the MMU index
for a specified security and privilege state. Refactor the
existing arm_v7m_mmu_idx_for_secstate() into a version that
lets you specify the privilege state and one that uses the
current state of the CPU.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1512153879-5291-6-git-send-email-peter.maydell@linaro.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/cpu.h | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c42d62d479..96316700dd 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2339,14 +2339,16 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx) } } -/* Return the MMU index for a v7M CPU in the specified security state */ -static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, - bool secstate) +/* Return the MMU index for a v7M CPU in the specified security and + * privilege state + */ +static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, + bool secstate, + bool priv) { - int el = arm_current_el(env); ARMMMUIdx mmu_idx = ARM_MMU_IDX_M; - if (el != 0) { + if (priv) { mmu_idx |= ARM_MMU_IDX_M_PRIV; } @@ -2361,6 +2363,15 @@ static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, return mmu_idx; } +/* Return the MMU index for a v7M CPU in the specified security state */ +static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, + bool secstate) +{ + bool priv = arm_current_el(env) != 0; + + return arm_v7m_mmu_idx_for_secstate_and_priv(env, secstate, priv); +} + /* Determine the current mmu_idx to use for normal loads/stores */ static inline int cpu_mmu_index(CPUARMState *env, bool ifetch) { |