diff options
| author | Richard Henderson | 2019-04-30 20:02:23 +0200 |
|---|---|---|
| committer | Richard Henderson | 2019-05-22 21:09:43 +0200 |
| commit | 38dc12947ec9106237f9cdbd428792c985cd86ae (patch) | |
| tree | e9358d64ea6a91ed24c196f3add29a1f958c6416 /tcg/README | |
| parent | tcg: Fix missing checks and clears in tcg_gen_gvec_dup_mem (diff) | |
| download | qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.tar.gz qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.tar.xz qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.zip | |
tcg: Add support for vector bitwise select
This operation performs d = (b & a) | (c & ~a), and is present
on a majority of host vector units. Include gvec expanders.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/README')
| -rw-r--r-- | tcg/README | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/tcg/README b/tcg/README index cbdfd3b6bc..76057ab59f 100644 --- a/tcg/README +++ b/tcg/README @@ -627,6 +627,10 @@ E.g. VECL=1 -> 64 << 1 -> v128, and VECE=2 -> 1 << 2 -> i32. Compare vectors by element, storing -1 for true and 0 for false. +* bitsel_vec v0, v1, v2, v3 + + Bitwise select, v0 = (v2 & v1) | (v3 & ~v1), across the entire vector. + ********* Note 1: Some shortcuts are defined when the last operand is known to be |