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author | Richard Henderson | 2015-07-24 16:16:00 +0200 |
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committer | Richard Henderson | 2015-08-24 20:10:54 +0200 |
commit | 609ad70562793937257c89d07bf7c1370b9fc9aa (patch) | |
tree | fd10a7febb6cfe6934d301b2b2dc7b675bade774 /tcg/README | |
parent | tcg: update README about size changing ops (diff) | |
download | qemu-609ad70562793937257c89d07bf7c1370b9fc9aa.tar.gz qemu-609ad70562793937257c89d07bf7c1370b9fc9aa.tar.xz qemu-609ad70562793937257c89d07bf7c1370b9fc9aa.zip |
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
Rather than allow arbitrary shift+trunc, only concern ourselves
with low and high parts. This is all that was being used anyway.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/README')
-rw-r--r-- | tcg/README | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/tcg/README b/tcg/README index a22f25145c..34c0775cff 100644 --- a/tcg/README +++ b/tcg/README @@ -314,11 +314,17 @@ This operation would be equivalent to dest = (t1 & ~0x0f00) | ((t2 << 8) & 0x0f00) -* trunc_shr_i64_i32 t0, t1, pos +* extrl_i64_i32 t0, t1 -For 64-bit hosts only, right shift the 64-bit input T1 by POS and -truncate to 32-bit output T0. Depending on the host, this may be -a simple mov/shift, or may require additional canonicalization. +For 64-bit hosts only, extract the low 32-bits of input T1 and place it +into 32-bit output T0. Depending on the host, this may be a simple move, +or may require additional canonicalization. + +* extrh_i64_i32 t0, t1 + +For 64-bit hosts only, extract the high 32-bits of input T1 and place it +into 32-bit output T0. Depending on the host, this may be a simple shift, +or may require additional canonicalization. ********* Conditional moves |