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author | Richard Henderson | 2017-11-17 14:35:11 +0100 |
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committer | Richard Henderson | 2018-02-08 16:54:05 +0100 |
commit | d0ec97967f940bbc11dced83422b39c224127f1e (patch) | |
tree | c06220facb6dad9bf2b97c36f8a24dd15489096a /tcg/README | |
parent | tcg: Add generic vector expanders (diff) | |
download | qemu-d0ec97967f940bbc11dced83422b39c224127f1e.tar.gz qemu-d0ec97967f940bbc11dced83422b39c224127f1e.tar.xz qemu-d0ec97967f940bbc11dced83422b39c224127f1e.zip |
tcg: Add generic vector ops for constant shifts
Opcodes are added for scalar and vector shifts, but considering the
varied semantics of these do not expose them to the front ends. Do
go ahead and provide them in case they are needed for backend expansion.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/README')
-rw-r--r-- | tcg/README | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/tcg/README b/tcg/README index f4695307bd..42d301961b 100644 --- a/tcg/README +++ b/tcg/README @@ -552,6 +552,35 @@ E.g. VECL=1 -> 64 << 1 -> v128, and VECE=2 -> 1 << 2 -> i32. Similarly, logical operations with and without compliment. Note that VECE is unused. +* shli_vec v0, v1, i2 +* shls_vec v0, v1, s2 + + Shift all elements from v1 by a scalar i2/s2. I.e. + + for (i = 0; i < VECL/VECE; ++i) { + v0[i] = v1[i] << s2; + } + +* shri_vec v0, v1, i2 +* sari_vec v0, v1, i2 +* shrs_vec v0, v1, s2 +* sars_vec v0, v1, s2 + + Similarly for logical and arithmetic right shift. + +* shlv_vec v0, v1, v2 + + Shift elements from v1 by elements from v2. I.e. + + for (i = 0; i < VECL/VECE; ++i) { + v0[i] = v1[i] << v2[i]; + } + +* shrv_vec v0, v1, v2 +* sarv_vec v0, v1, v2 + + Similarly for logical and arithmetic right shift. + ********* Note 1: Some shortcuts are defined when the last operand is known to be |