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author | Richard Henderson | 2020-10-15 20:53:54 +0200 |
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committer | Richard Henderson | 2021-02-02 23:12:31 +0100 |
commit | 3440d583d64dedf82e2774b266bcae46253d6b06 (patch) | |
tree | b7566116358384af8dbab4c4732b9529df4eab29 /tcg/arm/tcg-target-con-str.h | |
parent | tcg/i386: Split out target constraints to tcg-target-con-str.h (diff) | |
download | qemu-3440d583d64dedf82e2774b266bcae46253d6b06.tar.gz qemu-3440d583d64dedf82e2774b266bcae46253d6b06.tar.xz qemu-3440d583d64dedf82e2774b266bcae46253d6b06.zip |
tcg/arm: Split out target constraints to tcg-target-con-str.h
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm/tcg-target-con-str.h')
-rw-r--r-- | tcg/arm/tcg-target-con-str.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/tcg/arm/tcg-target-con-str.h b/tcg/arm/tcg-target-con-str.h new file mode 100644 index 0000000000..a0ab7747db --- /dev/null +++ b/tcg/arm/tcg-target-con-str.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Define Arm target-specific operand constraints. + * Copyright (c) 2021 Linaro + */ + +/* + * Define constraint letters for register sets: + * REGS(letter, register_mask) + */ +REGS('r', ALL_GENERAL_REGS) +REGS('l', ALL_QLOAD_REGS) +REGS('s', ALL_QSTORE_REGS) + +/* + * Define constraint letters for constants: + * CONST(letter, TCG_CT_CONST_* bit set) + */ +CONST('I', TCG_CT_CONST_ARM) +CONST('K', TCG_CT_CONST_INV) +CONST('N', TCG_CT_CONST_NEG) +CONST('Z', TCG_CT_CONST_ZERO) |