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| author | Jose R. Ziviani | 2021-09-08 20:53:38 +0200 |
|---|---|---|
| committer | Richard Henderson | 2021-09-14 21:00:20 +0200 |
| commit | 421519d82cb19dda07ee1711df30c4e29bffe97e (patch) | |
| tree | 812e331ec28f1a0b1c431d1c6f1acc1be4bef939 /tcg/arm | |
| parent | tcg/ppc: Ensure _CALL_SYSV is set for 32-bit ELF (diff) | |
| download | qemu-421519d82cb19dda07ee1711df30c4e29bffe97e.tar.gz qemu-421519d82cb19dda07ee1711df30c4e29bffe97e.tar.xz qemu-421519d82cb19dda07ee1711df30c4e29bffe97e.zip | |
tcg/arm: Fix tcg_out_vec_op function signature
Commit 5e8892db93 fixed several function signatures but tcg_out_vec_op
for arm is missing. It causes a build error on armv6 and armv7:
tcg-target.c.inc:2718:42: error: argument 5 of type 'const TCGArg *'
{aka 'const unsigned int *'} declared as a pointer [-Werror=array-parameter=]
const TCGArg *args, const int *const_args)
~~~~~~~~~~~~~~^~~~
../tcg/tcg.c:120:41: note: previously declared as an array 'const TCGArg[16]'
{aka 'const unsigned int[16]'}
const TCGArg args[TCG_MAX_OP_ARGS],
~~~~~~~~~~~~~~^~~~
Signed-off-by: Jose R. Ziviani <jziviani@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210908185338.7927-1-jziviani@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/arm')
| -rw-r--r-- | tcg/arm/tcg-target.c.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 007ceee68e..e5b4f86841 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -2715,7 +2715,8 @@ static const ARMInsn vec_cmp0_insn[16] = { static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl, unsigned vece, - const TCGArg *args, const int *const_args) + const TCGArg args[TCG_MAX_OP_ARGS], + const int const_args[TCG_MAX_OP_ARGS]) { TCGType type = vecl + TCG_TYPE_V64; unsigned q = vecl; |