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author | Richard Henderson | 2020-10-17 00:27:46 +0200 |
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committer | Richard Henderson | 2021-02-02 23:12:29 +0100 |
commit | 358b492392ad91d45a9714f7cd28fc1d83ffd8be (patch) | |
tree | d0ce2fcf2b5fef28011b0788913f5065e7ec2d04 /tcg/i386/tcg-target.c.inc | |
parent | tcg/i386: Tidy register constraint definitions (diff) | |
download | qemu-358b492392ad91d45a9714f7cd28fc1d83ffd8be.tar.gz qemu-358b492392ad91d45a9714f7cd28fc1d83ffd8be.tar.xz qemu-358b492392ad91d45a9714f7cd28fc1d83ffd8be.zip |
tcg/i386: Split out target constraints to tcg-target-con-str.h
This eliminates the target-specific function target_parse_constraint
and folds it into the single caller, process_op_defs. Since this is
done directly into the switch statement, duplicates are compilation
errors rather than silently ignored at runtime.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/i386/tcg-target.c.inc')
-rw-r--r-- | tcg/i386/tcg-target.c.inc | 69 |
1 files changed, 0 insertions, 69 deletions
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 4feb7e2aa1..d3cf97748a 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -209,75 +209,6 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, return true; } -/* parse target specific constraints */ -static const char *target_parse_constraint(TCGArgConstraint *ct, - const char *ct_str, TCGType type) -{ - switch(*ct_str++) { - case 'a': - tcg_regset_set_reg(ct->regs, TCG_REG_EAX); - break; - case 'b': - tcg_regset_set_reg(ct->regs, TCG_REG_EBX); - break; - case 'c': - tcg_regset_set_reg(ct->regs, TCG_REG_ECX); - break; - case 'd': - tcg_regset_set_reg(ct->regs, TCG_REG_EDX); - break; - case 'S': - tcg_regset_set_reg(ct->regs, TCG_REG_ESI); - break; - case 'D': - tcg_regset_set_reg(ct->regs, TCG_REG_EDI); - break; - case 'q': - /* A register that can be used as a byte operand. */ - ct->regs |= ALL_BYTEL_REGS; - break; - case 'Q': - /* A register with an addressable second byte (e.g. %ah). */ - ct->regs |= ALL_BYTEH_REGS; - break; - case 'r': - /* A general register. */ - ct->regs |= ALL_GENERAL_REGS; - break; - case 'W': - /* With TZCNT/LZCNT, we can have operand-size as an input. */ - ct->ct |= TCG_CT_CONST_WSZ; - break; - case 'x': - /* A vector register. */ - ct->regs |= ALL_VECTOR_REGS; - break; - - case 'L': - /* qemu_ld/st data+address constraint */ - ct->regs |= ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS; - break; - case 's': - /* qemu_st8_i32 data constraint */ - ct->regs |= ALL_BYTEL_REGS & ~SOFTMMU_RESERVE_REGS; - break; - - case 'e': - ct->ct |= TCG_CT_CONST_S32; - break; - case 'Z': - ct->ct |= TCG_CT_CONST_U32; - break; - case 'I': - ct->ct |= TCG_CT_CONST_I32; - break; - - default: - return NULL; - } - return ct_str; -} - /* test if a constant matches the constraint */ static inline int tcg_target_const_match(tcg_target_long val, TCGType type, const TCGArgConstraint *arg_ct) |