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| author | Richard Henderson | 2019-04-30 20:02:23 +0200 |
|---|---|---|
| committer | Richard Henderson | 2019-05-22 21:09:43 +0200 |
| commit | 38dc12947ec9106237f9cdbd428792c985cd86ae (patch) | |
| tree | e9358d64ea6a91ed24c196f3add29a1f958c6416 /tcg/i386 | |
| parent | tcg: Fix missing checks and clears in tcg_gen_gvec_dup_mem (diff) | |
| download | qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.tar.gz qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.tar.xz qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.zip | |
tcg: Add support for vector bitwise select
This operation performs d = (b & a) | (c & ~a), and is present
on a majority of host vector units. Include gvec expanders.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/i386')
| -rw-r--r-- | tcg/i386/tcg-target.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 66f16fbe3c..08a0386433 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -190,6 +190,7 @@ extern bool have_avx2; #define TCG_TARGET_HAS_mul_vec 1 #define TCG_TARGET_HAS_sat_vec 1 #define TCG_TARGET_HAS_minmax_vec 1 +#define TCG_TARGET_HAS_bitsel_vec 0 #define TCG_TARGET_deposit_i32_valid(ofs, len) \ (((ofs) == 0 && (len) == 8) || ((ofs) == 8 && (len) == 8) || \ |