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author | Richard Henderson | 2019-04-21 23:51:00 +0200 |
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committer | Richard Henderson | 2019-04-24 22:05:28 +0200 |
commit | aeee05f53a5d67304a521d2644dc0a607e3c8b28 (patch) | |
tree | 39ee5d6b8c296c391f80e8be214f0bc09f6ef364 /tcg/i386 | |
parent | tcg: Restart TB generation after constant pool overflow (diff) | |
download | qemu-aeee05f53a5d67304a521d2644dc0a607e3c8b28.tar.gz qemu-aeee05f53a5d67304a521d2644dc0a607e3c8b28.tar.xz qemu-aeee05f53a5d67304a521d2644dc0a607e3c8b28.zip |
tcg: Restart TB generation after out-of-line ldst overflow
This is part c of relocation overflow handling.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/i386')
-rw-r--r-- | tcg/i386/tcg-target.inc.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index 1fa833840e..d5ed9f1ffd 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -1730,7 +1730,7 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, bool is_64, /* * Generate code for the slow path for a load at the end of block */ -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { TCGMemOpIdx oi = l->oi; TCGMemOp opc = get_memop(oi); @@ -1809,12 +1809,13 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) /* Jump to the code corresponding to next IR of qemu_st */ tcg_out_jmp(s, l->raddr); + return true; } /* * Generate code for the slow path for a store at the end of block */ -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { TCGMemOpIdx oi = l->oi; TCGMemOp opc = get_memop(oi); @@ -1877,6 +1878,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) /* "Tail call" to the helper, with the return address back inline. */ tcg_out_push(s, retaddr); tcg_out_jmp(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); + return true; } #elif TCG_TARGET_REG_BITS == 32 # define x86_guest_base_seg 0 |