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| author | Richard Henderson | 2013-09-05 21:56:44 +0200 |
|---|---|---|
| committer | Richard Henderson | 2013-11-18 06:57:16 +0100 |
| commit | 3c289cba9b82ff55f52287a642332d4c2ca62b95 (patch) | |
| tree | 8cad9141ac2540f2a78d0d1d08edebf2becef8cf /tcg/ia64 | |
| parent | tcg-ia64: Move AREG0 to R32 (diff) | |
| download | qemu-3c289cba9b82ff55f52287a642332d4c2ca62b95.tar.gz qemu-3c289cba9b82ff55f52287a642332d4c2ca62b95.tar.xz qemu-3c289cba9b82ff55f52287a642332d4c2ca62b95.zip | |
tcg-ia64: Avoid unnecessary stop bit in tcg_out_alu
When performing an operation with two input registers, we'd leave
the stop bit (and thus an extra cycle) that's only needed when one
or the other input is a constant.
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/ia64')
| -rw-r--r-- | tcg/ia64/tcg-target.c | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c index 11a414c47c..aeb6bc7450 100644 --- a/tcg/ia64/tcg-target.c +++ b/tcg/ia64/tcg-target.c @@ -1044,31 +1044,26 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, } } -static inline void tcg_out_alu(TCGContext *s, uint64_t opc_a1, TCGArg ret, - TCGArg arg1, int const_arg1, - TCGArg arg2, int const_arg2) +static void tcg_out_alu(TCGContext *s, uint64_t opc_a1, TCGReg ret, TCGArg arg1, + int const_arg1, TCGArg arg2, int const_arg2) { - uint64_t opc1, opc2; + uint64_t opc1 = 0, opc2 = 0; if (const_arg1 && arg1 != 0) { opc1 = tcg_opc_a5(TCG_REG_P0, OPC_ADDL_A5, TCG_REG_R2, arg1, TCG_REG_R0); arg1 = TCG_REG_R2; - } else { - opc1 = INSN_NOP_M; } if (const_arg2 && arg2 != 0) { opc2 = tcg_opc_a5(TCG_REG_P0, OPC_ADDL_A5, TCG_REG_R3, arg2, TCG_REG_R0); arg2 = TCG_REG_R3; - } else { - opc2 = INSN_NOP_I; } - tcg_out_bundle(s, mII, - opc1, - opc2, + tcg_out_bundle(s, (opc1 || opc2 ? mII : miI), + opc1 ? opc1 : INSN_NOP_M, + opc2 ? opc2 : INSN_NOP_I, tcg_opc_a1(TCG_REG_P0, opc_a1, ret, arg1, arg2)); } |