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author | James Hogan | 2015-10-02 14:24:14 +0200 |
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committer | Richard Henderson | 2015-10-19 23:04:38 +0200 |
commit | ce14bd4d469f3a14f6cbfceb6360aee066a60d72 (patch) | |
tree | cec343b5326f31d69954c6dd94bdb933dfc94a67 /tcg/mips | |
parent | disas/mips: Add R6 jr/jr.hb to disassembler (diff) | |
download | qemu-ce14bd4d469f3a14f6cbfceb6360aee066a60d72.tar.gz qemu-ce14bd4d469f3a14f6cbfceb6360aee066a60d72.tar.xz qemu-ce14bd4d469f3a14f6cbfceb6360aee066a60d72.zip |
tcg/mips: Add use_mips32r6_instructions definition
Add definition use_mips32r6_instructions to the MIPS TCG backend which
is constant 1 when built for MIPS release 6. This will be used to decide
between pre-R6 and R6 instruction encodings.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1443788657-14537-4-git-send-email-james.hogan@imgtec.com>
Diffstat (limited to 'tcg/mips')
-rw-r--r-- | tcg/mips/tcg-target.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index f5ba52cacf..e579c10b9a 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -96,6 +96,13 @@ extern bool use_mips32_instructions; extern bool use_mips32r2_instructions; #endif +/* MIPS32R6 instruction set detection */ +#if defined(__mips_isa_rev) && (__mips_isa_rev >= 6) +#define use_mips32r6_instructions 1 +#else +#define use_mips32r6_instructions 0 +#endif + /* optional instructions */ #define TCG_TARGET_HAS_div_i32 1 #define TCG_TARGET_HAS_rem_i32 1 |