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| author | Richard Henderson | 2014-06-27 06:26:00 +0200 |
|---|---|---|
| committer | Peter Maydell | 2014-06-27 14:23:41 +0200 |
| commit | d4cba13bdf251baeedb36b87c1e9f6766773e380 (patch) | |
| tree | feb00c759613908a83226a695f4b80ca8e796d28 /tcg/ppc/tcg-target.c | |
| parent | coroutine-win32.c: Add noinline attribute to work around gcc bug (diff) | |
| download | qemu-d4cba13bdf251baeedb36b87c1e9f6766773e380.tar.gz qemu-d4cba13bdf251baeedb36b87c1e9f6766773e380.tar.xz qemu-d4cba13bdf251baeedb36b87c1e9f6766773e380.zip | |
tcg/ppc: Fix failure in tcg_out_mem_long
With rt != r0 on loads, we use rt for scratch. If we need an index
register different from base, we can't use rt, but r0 is usable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1403843160-30332-1-git-send-email-rth@twiddle.net
Tested-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/ppc/tcg-target.c')
| -rw-r--r-- | tcg/ppc/tcg-target.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index c83fd9fdc0..dd84e76127 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -805,7 +805,10 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, /* For unaligned, or very large offsets, use the indexed form. */ if (offset & align || offset != (int32_t)offset) { - tcg_debug_assert(rs != base && (!is_store || rs != rt)); + if (rs == base) { + rs = TCG_REG_R0; + } + tcg_debug_assert(!is_store || rs != rt); tcg_out_movi(s, TCG_TYPE_PTR, rs, orig); tcg_out32(s, opx | TAB(rt, base, rs)); return; |