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author | Richard Henderson | 2014-03-25 20:22:18 +0100 |
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committer | Richard Henderson | 2014-06-23 16:31:14 +0200 |
commit | de7761a39d341ab322f0c2f47ec3ec59a4a6f2a2 (patch) | |
tree | 0795f3e2849f064a66aa3025d7c718dbacd3c818 /tcg/ppc64/tcg-target.c | |
parent | tcg-ppc64: Move functions around (diff) | |
download | qemu-de7761a39d341ab322f0c2f47ec3ec59a4a6f2a2.tar.gz qemu-de7761a39d341ab322f0c2f47ec3ec59a4a6f2a2.tar.xz qemu-de7761a39d341ab322f0c2f47ec3ec59a4a6f2a2.zip |
tcg-ppc64: Relax register restrictions in tcg_out_mem_long
In order to be able to use tcg_out_ld/st sensibly with scratch
registers, assert only when we'd incorrectly clobber a scratch.
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/ppc64/tcg-target.c')
-rw-r--r-- | tcg/ppc64/tcg-target.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 951a392e68..dbe9c5c94d 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -714,10 +714,9 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, TCGReg base, tcg_target_long offset) { tcg_target_long orig = offset, l0, l1, extra = 0, align = 0; + bool is_store = false; TCGReg rs = TCG_REG_R2; - assert(rt != TCG_REG_R2 && base != TCG_REG_R2); - switch (opi) { case LD: case LWA: align = 3; @@ -725,19 +724,22 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, default: if (rt != TCG_REG_R0) { rs = rt; + break; } break; case STD: align = 3; - break; + /* FALLTHRU */ case STB: case STH: case STW: + is_store = true; break; } /* For unaligned, or very large offsets, use the indexed form. */ if (offset & align || offset != (int32_t)offset) { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, orig); - tcg_out32(s, opx | TAB(rt, base, TCG_REG_R2)); + tcg_debug_assert(rs != base && (!is_store || rs != rt)); + tcg_out_movi(s, TCG_TYPE_PTR, rs, orig); + tcg_out32(s, opx | TAB(rt, base, rs)); return; } |