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author | Richard Henderson | 2010-02-18 23:44:39 +0100 |
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committer | Blue Swirl | 2010-02-20 09:35:12 +0100 |
commit | 36828256692c3cecc83607f22761ceefc382040e (patch) | |
tree | a78607741f3b9da5cd8787641a9503442db06232 /tcg/ppc64/tcg-target.h | |
parent | tcg-sparc: Implement ORC. (diff) | |
download | qemu-36828256692c3cecc83607f22761ceefc382040e.tar.gz qemu-36828256692c3cecc83607f22761ceefc382040e.tar.xz qemu-36828256692c3cecc83607f22761ceefc382040e.zip |
tcg: Add comments for all optional instructions not implemented.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/ppc64/tcg-target.h')
-rw-r--r-- | tcg/ppc64/tcg-target.h | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h index 94b800fa6d..8f7891b78a 100644 --- a/tcg/ppc64/tcg-target.h +++ b/tcg/ppc64/tcg-target.h @@ -68,15 +68,34 @@ enum { #define TCG_TARGET_CALL_STACK_OFFSET 48 /* optional instructions */ -#define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_div_i32 -#define TCG_TARGET_HAS_neg_i64 -#define TCG_TARGET_HAS_div_i64 +// #define TCG_TARGET_HAS_rot_i32 #define TCG_TARGET_HAS_ext8s_i32 #define TCG_TARGET_HAS_ext16s_i32 +// #define TCG_TARGET_HAS_ext8u_i32 +// #define TCG_TARGET_HAS_ext16u_i32 +// #define TCG_TARGET_HAS_bswap16_i32 +// #define TCG_TARGET_HAS_bswap32_i32 +// #define TCG_TARGET_HAS_not_i32 +#define TCG_TARGET_HAS_neg_i32 +// #define TCG_TARGET_HAS_andc_i32 +// #define TCG_TARGET_HAS_orc_i32 + +#define TCG_TARGET_HAS_div_i64 +// #define TCG_TARGET_HAS_rot_i64 #define TCG_TARGET_HAS_ext8s_i64 #define TCG_TARGET_HAS_ext16s_i64 #define TCG_TARGET_HAS_ext32s_i64 +// #define TCG_TARGET_HAS_ext8u_i64 +// #define TCG_TARGET_HAS_ext16u_i64 +// #define TCG_TARGET_HAS_ext32u_i64 +// #define TCG_TARGET_HAS_bswap16_i64 +// #define TCG_TARGET_HAS_bswap32_i64 +// #define TCG_TARGET_HAS_bswap64_i64 +// #define TCG_TARGET_HAS_not_i64 +#define TCG_TARGET_HAS_neg_i64 +// #define TCG_TARGET_HAS_andc_i64 +// #define TCG_TARGET_HAS_orc_i64 #define TCG_AREG0 TCG_REG_R27 #define TCG_AREG1 TCG_REG_R24 |